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Message-ID: <8f8df889-3f88-4b9b-a238-16044796d897@quicinc.com>
Date: Mon, 15 Sep 2025 16:03:14 +0530
From: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Wasim Nazir
	<wasim.nazir@....qualcomm.com>,
        Ulf Hansson <ulf.hansson@...aro.org>, "Rob
 Herring" <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        "Conor
 Dooley" <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        "Konrad Dybcio" <konradybcio@...nel.org>,
        Richard Cochran
	<richardcochran@...il.com>,
        Bartosz Golaszewski <brgl@...ev.pl>
CC: <kernel@....qualcomm.com>, <linux-mmc@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-msm@...r.kernel.org>, <netdev@...r.kernel.org>,
        <linux-i2c@...r.kernel.org>
Subject: Re: [PATCH v4 07/14] arm64: dts: qcom: lemans-evk: Enable PCIe
 support


On 9/12/2025 5:57 PM, Konrad Dybcio wrote:
> On 9/8/25 10:19 AM, Wasim Nazir wrote:
>> From: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
>>
>> Enable PCIe0 and PCIe1 along with the respective phy-nodes.
>>
>> PCIe0 is routed to an m.2 E key connector on the mainboard for wifi
>> attaches while PCIe1 routes to a standard PCIe x4 expansion slot.
>>
>> Signed-off-by: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
>> Signed-off-by: Wasim Nazir <wasim.nazir@....qualcomm.com>
>> ---
> [...]
>
>> +		perst-pins {
>> +			pins = "gpio2";
>> +			function = "gpio";
>> +			drive-strength = <2>;
>> +			bias-pull-down;
>> +		};
> Pulling down an active-low pin is a bad idea

Ack, we should do pull up.
we took reference from the previous targets which seems to be wrong.
we will make it pull up.

Bjorn,
can you make this change while applying or shall we send new series.

- Sushrut

>
> Konrad

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