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Message-ID: <aMmTwsb0TaNuEnFC@lizhi-Precision-Tower-5810>
Date: Tue, 16 Sep 2025 12:43:46 -0400
From: Frank Li <Frank.li@....com>
To: Ioana Ciornei <ioana.ciornei@....com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Linus Walleij <linus.walleij@...aro.org>,
	Bartosz Golaszewski <brgl@...ev.pl>,
	Shawn Guo <shawnguo@...nel.org>, Michael Walle <mwalle@...nel.org>,
	Lee Jones <lee@...nel.org>, devicetree@...r.kernel.org,
	linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 7/9] arm64: dts: ls1046a-qds: describe the FPGA based
 GPIO controller

On Mon, Sep 15, 2025 at 03:23:52PM +0300, Ioana Ciornei wrote:
> The QIXIS FPGA node is extended so that it describes the GPIO controller
> responsible for all the status presence lines on both SFP+ cages as well
> as the IO SLOTs present on the board.
>
> Signed-off-by: Ioana Ciornei <ioana.ciornei@....com>

Reviewed-by: Frank Li <Frank.Li@....com>

> ---
> Changes in v2:
> - none
>
>  arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
> index 736722b58e77..64133e63da96 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
> @@ -166,8 +166,20 @@ nand@1,0 {
>
>  	fpga: board-control@2,0 {
>  		compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-mfd";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
>  		reg = <0x2 0x0 0x0000100>;
>  		ranges = <0 2 0 0x100>;
> +
> +		stat_pres2: gpio-stat-pres2@c {
> +			compatible = "fsl,ls1046aqds-fpga-gpio-stat-pres2";
> +			reg = <0xc 1>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			gpio-line-names =
> +				"SLOT1", "SLOT2", "SLOT3", "SLOT4", "SLOT5", "SLOT6",
> +				"SFP1_MOD_DEF", "SFP2_MOD_DEF";
> +		};
>  	};
>  };
>
> --
> 2.25.1
>

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