linux-kernel - Re: [RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for TI K3 SoCs

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Message-ID: <7aafd8bd-4710-45e8-ad54-4d8b44de2b25@ti.com>
Date: Tue, 16 Sep 2025 15:57:31 -0500
From: Judith Mendez <jm@...com>
To: Andrew Davis <afd@...com>, Srinivas Kandagatla <srini@...nel.org>,
        Rob
 Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor
 Dooley <conor+dt@...nel.org>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Bryan
 Brattlof <bb@...com>
Subject: Re: [RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for
 TI K3 SoCs

Hi Andrew,

On 9/16/25 11:31 AM, Andrew Davis wrote:
> On 9/16/25 10:48 AM, Judith Mendez wrote:
>> On K3 SoCs there are efuse registers scattered across the memory
>> map. In order to reference these efuse registers like gp-sw which
>> may store SW REV information or other general purpose information
>> for drivers to consume, treat them appropriately as efuse devices
>> with nvmem framework.
>>
>> Signed-off-by: Judith Mendez <jm@...com>
>> ---
>> This patch is not complete and is sent as an RFC to get some initial
>> thoughts on this implementation to solve [0].
>>
>> [0] https://lore.kernel.org/linux- 
>> mmc/736f09e0-075a-48e0-9b32-6b8805a7ee2a@...nel.org
>> ---
>>   .../devicetree/bindings/nvmem/ti,efuses.yaml  | 36 +++++++++++++++++++
>>   1 file changed, 36 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/nvmem/ 
>> ti,efuses.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml b/ 
>> Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
>> new file mode 100644
>> index 0000000000000..fffca65cdbfe0
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
>> @@ -0,0 +1,36 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/nvmem/ti,efuses.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: TI SoC eFuse-based NVMEM
>> +
>> +maintainers:
>> +  - Judith Mendez <jm@...com>
>> +
>> +allOf:
>> +  - $ref: nvmem.yaml#
>> +  - $ref: nvmem-deprecated-cells.yaml#
> 
> As the name suggests, this old fix-layout is deprecated, you
> should look at using the newer NVMEM layouts style for this node.

Fair point, this can be fixed.

> 
>> +
>> +properties:
>> +  compatible:
>> +    - const: ti,am62p-efuse
> 
> You mention in the commit message, there are a couple efuse regions
> in the AM62P SoC, so does this apply generally to all of them, or
> should you have this be specific to the "gp-sw" efuse region you
> are describing here?

I think it is better if this can be more generic, so not only should
it apply to gp-sw, gp-sw is only one example register we could treat
as efuse register.

> 
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    efuse@...00230 {
>> +        compatible = "ti,am62p-efuse";
>> +        reg = <0x43000230 0x4>;
> 
> The efuse region at 0x43000230 is 96bits, so this should be 0xc not 0x4 
> size.

oop, this will be fixed, thanks.

~ Judith