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Message-ID: <cc00cc74-778f-45ae-b48f-be26c91f78c7@lunn.ch>
Date: Wed, 17 Sep 2025 00:05:07 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Rebecca Cran <rebecca@...io.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] ARM: dts: aspeed: add device tree for ASRock Rack
ALTRAD8 BMC
On Tue, Sep 16, 2025 at 03:22:04PM -0600, Rebecca Cran wrote:
> On 9/16/25 13:07, Andrew Lunn wrote:
>
> > Now, it looks like all other aspeed-g5 boards also don't link to the
> > PHY. But the driver does seem to support adding an 'mdio' node within
> > the ethernet node, and listing the PHYs. Something like:
> >
> > mdio {
> > #address-cells = <1>;
> > #size-cells = <0>;
> >
> > ethphy0: ethernet-phy@0 {
> > reg = <0>;
> > };
> > };
> >
> > And then you can add a phy-handle to point to it.
> >
> > Then the question is, did Aspeed mess up the RGMII delays for g5? You
> > can try phy-mode = 'rgmii-id' and see if it works.
>
> I can't get that to work, with either 'rgmii-id' or 'rgmii'.
>
> It says "Failed to connect to phy".
That probably means i have the wrong reg value. Try 1, 2, ... 31.
Or put a printk() in phy_find_first() to print the value of addr.
Andrew
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