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Message-ID: <175802983980.3653941.6041553285815630800.robh@kernel.org>
Date: Tue, 16 Sep 2025 08:37:20 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Drew Fustini <fustini@...nel.org>
Cc: Arnd Bergmann <arnd@...db.de>, Paul Walmsley <paul.walmsley@...ive.com>,
	Joel Stanley <joel@....id.au>, Michael Neuling <mikey@...ling.org>,
	Palmer Dabbelt <palmer@...belt.com>,
	Alexandre Ghiti <alex@...ti.fr>,
	Thomas Gleixner <tglx@...utronix.de>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Drew Fustini <dfustini@...storrent.com>,
	Conor Dooley <conor@...nel.org>, linux-riscv@...ts.infradead.org,
	Anup Patel <anup@...infault.org>, devicetree@...r.kernel.org,
	Samuel Holland <samuel.holland@...ive.com>,
	linux-kernel@...r.kernel.org, Nicholas Piggin <npiggin@...il.com>,
	Joel Stanley <jms@...storrent.com>, Andy Gross <agross@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Michael Ellerman <mpe@...nel.org>,
	Daniel Lezcano <daniel.lezcano@...aro.org>
Subject: Re: [PATCH 3/7] dt-bindings: riscv: cpus: Add SiFive X280 compatible


On Sat, 13 Sep 2025 14:31:02 -0700, Drew Fustini wrote:
> From: Drew Fustini <dfustini@...storrent.com>
> 
> Document compatible for the SiFive X280 RISC-V core.
> 
> Signed-off-by: Drew Fustini <dfustini@...storrent.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring (Arm) <robh@...nel.org>


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