linux-kernel - [PATCH v5 6/6] docs: arm64: Document booting requirements for FEAT

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20250917145618.1232329-7-yeoreum.yun@arm.com>
Date: Wed, 17 Sep 2025 15:56:18 +0100
From: Yeoreum Yun <yeoreum.yun@....com>
To: catalin.marinas@....com,
	will@...nel.org,
	broonie@...nel.org,
	oliver.upton@...ux.dev,
	anshuman.khandual@....com,
	robh@...nel.org,
	james.morse@....com,
	mark.rutland@....com,
	joey.gouly@....com,
	Dave.Martin@....com,
	ahmed.genidi@....com,
	kevin.brodsky@....com,
	scott@...amperecomputing.com,
	mbenes@...e.cz,
	james.clark@...aro.org,
	frederic@...nel.org,
	rafael@...nel.org,
	pavel@...nel.org,
	ryan.roberts@....com,
	suzuki.poulose@....com,
	maz@...nel.org
Cc: linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-pm@...r.kernel.org,
	kvmarm@...ts.linux.dev,
	Yeoreum Yun <yeoreum.yun@....com>
Subject: [PATCH v5 6/6] docs: arm64: Document booting requirements for FEAT_SCTLR2

From: Dave Martin <Dave.Martin@....com>

Support for FEAT_SCTLR2 imposes some requirments on the configuration
of traps at exception levels above the level at which the kernel is
booted.

Document them.

For now, don't document requirements on the initial state of SCTLR2_ELx
at the kernel boot exception level.  The general wording under "System
registers" appiles.  (SCTLR_ELx is similarly undocumented.)

Signed-off-by: Dave Martin <Dave.Martin@....com>
Reviewed-by: Yeoreum Yun <yeoreum.yun@....com>
Signed-off-by: Yeoreum Yun <yeoreum.yun@....com>
---
 Documentation/arch/arm64/booting.rst | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/arch/arm64/booting.rst b/Documentation/arch/arm64/booting.rst
index 2f666a7c303c..e8fe1b2023a9 100644
--- a/Documentation/arch/arm64/booting.rst
+++ b/Documentation/arch/arm64/booting.rst
@@ -545,6 +545,16 @@ Before jumping into the kernel, the following conditions must be met:
 
    - MDCR_EL3.TPM (bit 6) must be initialized to 0b0
 
+  For CPUs with the SCTLR2_ELx registers (FEAT_SCTLR2):
+
+  - If EL3 is present:
+
+    - SCR_EL3.SCTLR2En (bit 44) must be initialised to 0b1.
+
+  - If the kernel is entered at EL1 and EL2 is present:
+
+    - HCRX_EL2.SCTLR2En (bit 15) must be initialised to 0b1.
+
 The requirements described above for CPU mode, caches, MMUs, architected
 timers, coherency and system registers apply to all CPUs.  All CPUs must
 enter the kernel in the same exception level.  Where the values documented
-- 
LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}