| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <634a38d3-0a20-471d-bc39-44a822df00dd@oss.qualcomm.com>
Date: Wed, 17 Sep 2025 11:12:04 +0800
From: yuanfang zhang <yuanfang.zhang@....qualcomm.com>
To: Mike Leach <mike.leach@...aro.org>
Cc: Suzuki K Poulose <suzuki.poulose@....com>,
James Clark <james.clark@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, coresight@...ts.linaro.org,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
kernel@....qualcomm.com, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
Leo Yan <leo.yan@....com>
Subject: Re: [PATCH v4 0/3] coresight-tnoc: Add support for Interconnect TNOC
On 9/16/2025 9:00 PM, Mike Leach wrote:
> Hi,
>
> I'm a little confused as to precisely what this component is.
>
> From the description in the DT - it appears to be very much like a
> static trace funnel - multiple inputs, and a single output.
> The DT describes the inputs as "Coresight Trace". What is meant here?
> - if this is ATB trace then this component is identical to the
> coresight trace funnel in functionality so should probably use the
> normal CS static funnel driver.
>
> However - if it does not appear on the AMBA bus - how are the
> coresight management registers read - these are a mandatory
> requirement in the CoreSight specification for any coresight
> compatible component?
>
> Thanks
>
> Mike
>
Hi Mike,
"Coresight Trace" means ATB trace, the Video TNOC in the following example is an interconnect TNOC.
It is used to replace TPDA and Funnel. Compared to Funnel, it is easier to configure and only
requires enabling once, without the need to enable each inport separately.
it has "reg" parameter on DT, can use memory-map to read management registers.
+------------------------+ +-------------------------+
| Video Subsystem | |Video Subsystem |
| +-------------+ | | +------------+ |
| | Video TPDM | | | | Video TPDM | |
| +-------------+ | | +------------+ |
| | | | | |
| v | | v |
| +---------------+ | | +-----------+ |
| | Video funnel | | | |Video TNOC | |
| +---------------+ | | +-----------+ |
+------------|-----------+ +------------|------------+
| |
v-----+ |
+--------------------|---------+ |
| Multimedia v | |
| Subsystem +--------+ | |
| | TPDA | | v
| +----|---+ | +---------------------+
| | | | Aggregator TNOC |
| | | +----------|----------+
| +-- | |
| | | |
| | | |
| +------v-----+ | |
| | Funnel | | |
| +------------+ | |
+----------------|-------------+ |
| |
v v
+--------------------+ +------------------+
| Coresight Sink | | Coresight Sink |
+--------------------+ +------------------+
Current Configuration TNOC
This example is from the trace noce patch below:
https://lore.kernel.org/all/20250710-trace-noc-v11-0-f849075c40b8@quicinc.com/
> On Tue, 16 Sept 2025 at 03:35, yuanfang zhang
> <yuanfang.zhang@....qualcomm.com> wrote:
>>
>> Hi Suzuki,
>>
>> Could this patch series be applied? Is there anything I need to update?
>>
>> thanks,
>> yuanfang.
>>
>> On 9/1/2025 2:58 PM, Yuanfang Zhang wrote:
>>> This patch series adds support for the Qualcomm CoreSight Interconnect TNOC
>>> (Trace Network On Chip) block, which acts as a CoreSight graph link forwarding
>>> trace data from subsystems to the Aggregator TNOC. Unlike the Aggregator TNOC,
>>> this block does not support aggregation or ATID assignment.
>>>
>>> Signed-off-by: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
>>> ---
>>> Changes in v4:
>>> - Fix unintended blank line removals in trace_noc_enable_hw.
>>> - Link to v3: https://lore.kernel.org/r/20250828-itnoc-v3-0-f1b55dea7a27@oss.qualcomm.com
>>>
>>> Changes in v3:
>>> - Add detail for changes in V2.
>>> - Remove '#address-cells' and '#size-cells' properties from in-ports field.
>>> - Fix comment indentation for packet description.
>>> - Link to v2: https://lore.kernel.org/r/20250819-itnoc-v2-0-2d0e6be44e2f@oss.qualcomm.com
>>>
>>> Changes in v2:
>>> - Removed the trailing '|' after the description in qcom,coresight-itnoc.yaml.
>>> - Dropped the 'select' section from the YAML file.
>>> - Updated node name to use a more generic naming convention.
>>> - Removed the 'items' property from the compatible field.
>>> - Deleted the description for the reg property.
>>> - Dropped clock-names and adjusted the order of clock-names and clocks.
>>> - Moved additionalProperties to follow the $ref of out-ports.
>>> - Change "atid" type from u32 to int, set it as "-EOPNOTSUPP" for non-AMBA device.
>>> - Link to v1: https://lore.kernel.org/r/20250815-itnoc-v1-0-62c8e4f7ad32@oss.qualcomm.com
>>>
>>> ---
>>> Yuanfang Zhang (3):
>>> dt-bindings: arm: qcom: Add Coresight Interconnect TNOC
>>> coresight-tnoc: add platform driver to support Interconnect TNOC
>>> coresight-tnoc: Add runtime PM support for Interconnect TNOC
>>>
>>> .../bindings/arm/qcom,coresight-itnoc.yaml | 90 ++++++++++++++
>>> drivers/hwtracing/coresight/coresight-tnoc.c | 136 +++++++++++++++++++--
>>> 2 files changed, 215 insertions(+), 11 deletions(-)
>>> ---
>>> base-commit: 2b52cf338d39d684a1c6af298e8204902c026aca
>>> change-id: 20250815-itnoc-460273d1b80c
>>>
>>> Best regards,
>>
>
>
Powered by blists - more mailing lists