[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <86o6r9121f.wl-maz@kernel.org>
Date: Wed, 17 Sep 2025 17:23:08 +0100
From: Marc Zyngier <maz@...nel.org>
To: Sascha Bischoff <Sascha.Bischoff@....com>
Cc: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"kvmarm@...ts.linux.dev"
<kvmarm@...ts.linux.dev>,
"linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
nd <nd@....com>,
"oliver.upton@...ux.dev" <oliver.upton@...ux.dev>,
Joey Gouly
<Joey.Gouly@....com>,
Suzuki Poulose <Suzuki.Poulose@....com>,
"yuzenghui@...wei.com" <yuzenghui@...wei.com>,
"will@...nel.org"
<will@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"lpieralisi@...nel.org" <lpieralisi@...nel.org>,
Timothy Hayes
<Timothy.Hayes@....com>
Subject: Re: [PATCH 1/5] KVM: arm64: Allow ICC_SRE_EL2 accesses on a GICv5 host
On Thu, 28 Aug 2025 11:59:42 +0100,
Sascha Bischoff <Sascha.Bischoff@....com> wrote:
>
> The bet0 release of the GICv5 specification didn't include the
> ICC_SRE_EL2 register as part of FEAT_GCIE_LEGACY. This was an
> oversight, and support for this register has been added as of the bet1
> release of the specification.
>
> Remove the guarding in the vGICv3 code that skipped the ICC_SRE_EL2
> accesses for a GICv5 host. As a result of this change, it now becomes
> possible to use nested virtualisation on a GICv5 host when running
> legacy GICv3-based VMs.
>
> Signed-off-by: Sascha Bischoff <sascha.bischoff@....com>
I just remembered my promise from almost 3 weeks ago, and just posted
this:
https://lore.kernel.org/r/20250917161935.1630908-1-maz@kernel.org
which kills two birds with one stone. I'll take it as a prefix to this
series.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
Powered by blists - more mailing lists