linux-kernel - Re: [PATCH v2 1/5] spi: spi-nxp-fspi: extract function nxp_fspi_dll

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <aMrg0CnsdQozU9G7@lizhi-Precision-Tower-5810>
Date: Wed, 17 Sep 2025 12:24:48 -0400
From: Frank Li <Frank.li@....com>
To: Haibo Chen <haibo.chen@....com>
Cc: Han Xu <han.xu@....com>, Yogesh Gaur <yogeshgaur.83@...il.com>,
	Mark Brown <broonie@...nel.org>, linux-spi@...r.kernel.org,
	imx@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/5] spi: spi-nxp-fspi: extract function
 nxp_fspi_dll_override()

On Wed, Sep 17, 2025 at 03:27:06PM +0800, Haibo Chen wrote:
> Extract function nxp_fspi_dll_override(), this is the suggested setting
> when clock rate < 100MHz. Just the preparation of supportting DTR mode.

Remove "this is the suggested setting when clock rate < 100MHz", which is
not related this patch.

Extract nxp_fspi_dll_override() for preparation of DTR mode support.

Reviewed-by: Frank Li <Frank.Li@....com>
>
> Signed-off-by: Haibo Chen <haibo.chen@....com>
> ---
>  drivers/spi/spi-nxp-fspi.c | 19 ++++++++++++-------
>  1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> index 848fa9319e36d65e8152931324b8e34eb162f5d3..db4b92490de957580c6298baeb8b68a310c23615 100644
> --- a/drivers/spi/spi-nxp-fspi.c
> +++ b/drivers/spi/spi-nxp-fspi.c
> @@ -674,6 +674,17 @@ static void nxp_fspi_dll_calibration(struct nxp_fspi *f)
>  		dev_warn(f->dev, "DLL lock failed, please fix it!\n");
>  }
>
> +/*
> + * Config the DLL register to default value, enable the target clock delay
> + * line delay cell override mode, and use 1 fixed delay cell in DLL delay
> + * chain, this is the suggested setting when clock rate < 100MHz.
> + */
> +static void nxp_fspi_dll_override(struct nxp_fspi *f)
> +{
> +	fspi_writel(f, FSPI_DLLACR_OVRDEN, f->iobase + FSPI_DLLACR);
> +	fspi_writel(f, FSPI_DLLBCR_OVRDEN, f->iobase + FSPI_DLLBCR);
> +}
> +
>  /*
>   * In FlexSPI controller, flash access is based on value of FSPI_FLSHXXCR0
>   * register and start base address of the target device.
> @@ -1071,13 +1082,7 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
>  	/* Disable the module */
>  	fspi_writel(f, FSPI_MCR0_MDIS, base + FSPI_MCR0);
>
> -	/*
> -	 * Config the DLL register to default value, enable the target clock delay
> -	 * line delay cell override mode, and use 1 fixed delay cell in DLL delay
> -	 * chain, this is the suggested setting when clock rate < 100MHz.
> -	 */
> -	fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
> -	fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
> +	nxp_fspi_dll_override(f);
>
>  	/* enable module */
>  	fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) |
>
> --
> 2.34.1
>