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Message-Id: <20250917045238.1048484-3-hongxing.zhu@nxp.com>
Date: Wed, 17 Sep 2025 12:52:37 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: frank.li@....com,
l.stach@...gutronix.de,
lpieralisi@...nel.org,
kwilczynski@...nel.org,
mani@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
bhelgaas@...gle.com,
shawnguo@...nel.org,
s.hauer@...gutronix.de,
kernel@...gutronix.de,
festevam@...il.com
Cc: linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org,
imx@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Richard Zhu <hongxing.zhu@....com>,
Frank Li <Frank.Li@....com>
Subject: [PATCH v6 2/3] dt-bindings: pci-imx6: Add one more external reference clock
i.MX95 PCIes have two reference clock inputs: one from internal PLL,
the other from off chip crystal oscillator. Use extref clock name to be
onhalf of the reference clock comes from external crystal oscillator.
Add one more external reference clock for i.MX95 PCIes.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
Reviewed-by: Frank Li <Frank.Li@....com>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index ca5f2970f217..b4c40d0573dc 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -212,14 +212,17 @@ allOf:
then:
properties:
clocks:
+ minItems: 4
maxItems: 5
clock-names:
+ minItems: 4
items:
- const: pcie
- const: pcie_bus
- const: pcie_phy
- const: pcie_aux
- const: ref
+ - const: extref # Optional
unevaluatedProperties: false
--
2.37.1
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