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Message-Id: <20250917-ipq5018-uart2-v1-1-f8680bbf947f@outlook.com>
Date: Wed, 17 Sep 2025 15:49:00 +0400
From: George Moussalem via B4 Relay <devnull+george.moussalem.outlook.com@...nel.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Manikanta Mylavarapu <quic_mmanikan@...cinc.com>,
George Moussalem <george.moussalem@...look.com>
Subject: [PATCH] arm64: dts: qcom: ipq5018: add QUP1 UART2 node
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
Add node to support the second UART node controller in IPQ5018.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
Signed-off-by: George Moussalem <george.moussalem@...look.com>
---
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
index e88b52006566fd39c0690e6fb53be743eb56d11b..52840eb00a262a05fe2e7cbe5b77c47ff5937222 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -490,6 +490,16 @@ blsp1_uart1: serial@...f000 {
status = "disabled";
};
+ blsp1_uart2: serial@...0000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x078b0000 0x200>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
blsp1_spi1: spi@...5000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
---
base-commit: 05af764719214d6568adb55c8749dec295228da8
change-id: 20250917-ipq5018-uart2-999482e00c7c
Best regards,
--
George Moussalem <george.moussalem@...look.com>
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