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Message-ID: <20250917114932.25994-2-lists@wildgooses.com>
Date: Wed, 17 Sep 2025 11:49:30 +0000
From: Ed Wildgoose <lists@...dgooses.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
Ed Wildgoose <lists@...dgooses.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 1/2] arm64: dts: rockchip: correct uart mux for Radxa ZERO 3
The rk3566 has multiplexed pins and the uarts can be moved to a choice
of 2 pin groups. The default rk356x-base.dtsi appears to default to mux0
for all uarts, however, specific hardware might choose to implement
alternatives
The Radxa zero 3 shows that is uses M1 for uarts:
- uart4
- uart5
- uart9
These aren't normally enabled, but we should at least correct the
default pinctrl definitions. Without these changes there will be
conflicts with mmc0/mmc1, leading to the SD or eMMC going missing.
Signed-off-by: Ed Wildgoose <lists@...dgooses.com>
---
.../boot/dts/rockchip/rk3566-radxa-zero-3.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
index 1ee5d96a4..41b3c4403 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
@@ -492,6 +492,21 @@ &uart2 {
status = "okay";
};
+&uart4{
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4m1_xfer>;
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5m1_xfer>;
+};
+
+&uart9 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart9m1_xfer>;
+};
+
&usb_host0_xhci {
status = "okay";
};
--
2.49.0
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