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Message-ID: <32937382-ad81-4e9b-92d7-798dafea64c1@linaro.org>
Date: Thu, 18 Sep 2025 16:08:40 +0200
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: Christophe JAILLET <christophe.jaillet@...adoo.fr>, jic23@...nel.org,
dlechner@...libre.com, nuno.sa@...log.com, andy@...nel.org, robh@...nel.org,
conor+dt@...nel.org, krzk+dt@...nel.org
Cc: linux-iio@...r.kernel.org, s32@....com, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, chester62515@...il.com, mbrugger@...e.com,
ghennadi.procopciuc@....nxp.com
Subject: Re: [PATCH v3 2/2] iio: adc: Add the NXP SAR ADC support for the
s32g2/3 platforms
Hi Christophe,
On 16/09/2025 22:53, Christophe JAILLET wrote:
[ ... ]
>> +static int nxp_sar_adc_dma_probe(struct device *dev, struct
>> nxp_sar_adc *info)
>> +{
>> + struct device *dev_dma;
>> + u8 *rx_buf;
>> +
>> + info->dma_chan = devm_dma_request_chan(dev, "rx");
>> + if (IS_ERR(info->dma_chan))
>> + return PTR_ERR(info->dma_chan);
>> +
>> + dev_dma = info->dma_chan->device->dev;
>> + rx_buf = dma_alloc_coherent(dev_dma, NXP_SAR_ADC_DMA_BUFF_SZ,
>> + &info->rx_dma_buf, GFP_KERNEL);
>
> maybe dmam_alloc_coherent() for the managed version?
> This would save some LoC.
Ok, thanks for the suggestion, I'll do the change.
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