linux-kernel - Re: [PATCH v2 1/3] dt-bindings: net: dsa: nxp,sja1105: Add reset-gpios property

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Message-ID: <aMwmGFkZS1sSQDMD@lizhi-Precision-Tower-5810>
Date: Thu, 18 Sep 2025 11:32:40 -0400
From: Frank Li <Frank.li@....com>
To: Jonas Rebmann <jre@...gutronix.de>
Cc: Andrew Lunn <andrew@...n.ch>, Vladimir Oltean <olteanv@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Liam Girdwood <lgirdwood@...il.com>,
	Mark Brown <broonie@...nel.org>,
	Shengjiu Wang <shengjiu.wang@....com>,
	Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Vladimir Oltean <vladimir.oltean@....com>, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-sound@...r.kernel.org, imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 1/3] dt-bindings: net: dsa: nxp,sja1105: Add
 reset-gpios property

On Thu, Sep 18, 2025 at 02:19:44PM +0200, Jonas Rebmann wrote:
> Both the nxp,sja1105 and the nxp,sja1110 series feature an active-low
> reset pin, rendering reset-gpios a valid property for all of the
> nxp,sja1105 family.
>
> Signed-off-by: Jonas Rebmann <jre@...gutronix.de>

Reviewed-by: Frank Li <Frank.Li@....com>

> ---
>  Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
> index 9432565f4f5d..e9dd914b0734 100644
> --- a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
> +++ b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
> @@ -32,6 +32,15 @@ properties:
>    reg:
>      maxItems: 1
>
> +  reset-gpios:
> +    description:
> +      A GPIO connected to the active-low RST_N pin of the SJA1105. Note that
> +      reset of this chip is performed via SPI and the RST_N pin must be wired
> +      to satisfy the power-up sequence documented in "SJA1105PQRS Application
> +      Hints" (AH1704) sec. 2.4.4. Connecting the SJA1105 RST_N pin to a GPIO is
> +      therefore discouraged.
> +    maxItems: 1
> +
>    spi-cpha: true
>    spi-cpol: true
>
>
> --
> 2.51.0.178.g2462961280
>