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Message-ID: <20250918-iwdg1-v1-1-02c2543c01a5@foss.st.com>
Date: Thu, 18 Sep 2025 17:35:38 +0200
From: Gatien Chevallier <gatien.chevallier@...s.st.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin
<mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>
CC: <devicetree@...r.kernel.org>, <linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
Gatien Chevallier <gatien.chevallier@...s.st.com>
Subject: [PATCH 1/4] ARM: dts: stm32: add iwdg1 node in stm32mp131.dtsi
Add the IWDG1 node in the stm32mp131.dtsi SoC device tree file. It can
be used as the Cortex-A7 watchdog when it's configured as non-secure.
Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
---
arch/arm/boot/dts/st/stm32mp131.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index fd730aa37c22e02ec2fd8171f569ab681f47d737..583938ea5c08163b1b100a2aef5894f4a7f34a51 100644
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -1005,6 +1005,15 @@ iwdg2: watchdog@...02000 {
status = "disabled";
};
+ iwdg1: watchdog@...03000 {
+ compatible = "st,stm32mp1-iwdg";
+ reg = <0x5c003000 0x400>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc IWDG1>, <&scmi_clk CK_SCMI_LSI>;
+ clock-names = "pclk", "lsi";
+ status = "disabled";
+ };
+
rtc: rtc@...04000 {
compatible = "st,stm32mp1-rtc";
reg = <0x5c004000 0x400>;
--
2.25.1
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