linux-kernel - Re: [PATCH] perf/dwc_pcie: Support counting multiple lane events in parallel

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Message-Id: <175819993397.3464193.5312337667087987176.b4-ty@kernel.org>
Date: Thu, 18 Sep 2025 17:43:07 +0100
From: Will Deacon <will@...nel.org>
To: Shuai Xue <xueshuai@...ux.alibaba.com>,
	Jing Zhang <renyu.zj@...ux.alibaba.com>,
	Jonathan Corbet <corbet@....net>,
	Mark Rutland <mark.rutland@....com>,
	Ilkka Koskinen <ilkka@...amperecomputing.com>
Cc: catalin.marinas@....com,
	kernel-team@...roid.com,
	Will Deacon <will@...nel.org>,
	linux-doc@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-perf-users@...r.kernel.org
Subject: Re: [PATCH] perf/dwc_pcie: Support counting multiple lane events in parallel

On Thu, 28 Aug 2025 15:35:19 -0700, Ilkka Koskinen wrote:
> While Designware PCIe PMU allows to count only one time based event
> at a time, it allows to count all the lane events simultaneously.
> After the patch one is able to count a group of lane events:
> 
>   $  perf stat -e '{dwc_rootport/tx_memory_write,lane=1/,dwc_rootport/rx_memory_read,lane=0/}' dd if=/dev/nvme0n1 of=/dev/null bs=1M count=1
> 
> Earlier the events wouldn't have been counted successfully.
> 
> [...]

Applied to will (for-next/perf), thanks!

[1/1] perf/dwc_pcie: Support counting multiple lane events in parallel
      https://git.kernel.org/will/c/71396cfac97d

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev