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Message-Id: <20250919-rda8810pl-mmc-v1-10-d4f08a05ba4d@mainlining.org>
Date: Fri, 19 Sep 2025 01:48:50 +0700
From: Dang Huynh via B4 Relay <devnull+dang.huynh.mainlining.org@...nel.org>
To: Manivannan Sadhasivam <mani@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>, Kees Cook <kees@...nel.org>,
"Gustavo A. R. Silva" <gustavoars@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, linux-unisoc@...ts.infradead.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
dmaengine@...r.kernel.org, linux-mmc@...r.kernel.org,
linux-hardening@...r.kernel.org, Dang Huynh <dang.huynh@...nlining.org>
Subject: [PATCH 10/10] ARM: dts: unisoc: rda8810pl: Add SDMMC controllers
From: Dang Huynh <dang.huynh@...nlining.org>
Add SDMMC1 and 2 controllers for the RDA8810PL platform and enable it
on the Orange Pi i96 and 2G-IOT.
Signed-off-by: Dang Huynh <dang.huynh@...nlining.org>
---
.../boot/dts/unisoc/rda8810pl-orangepi-2g-iot.dts | 20 +++++++++
.../arm/boot/dts/unisoc/rda8810pl-orangepi-i96.dts | 20 +++++++++
arch/arm/boot/dts/unisoc/rda8810pl.dtsi | 47 ++++++++++++++++++++--
3 files changed, 83 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-2g-iot.dts b/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-2g-iot.dts
index 98e34248ae80b1fcd673ff01fe045db412d5bcc9..b462057ec0d1eb1877eb770afa6aced99efd84b7 100644
--- a/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-2g-iot.dts
+++ b/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-2g-iot.dts
@@ -6,6 +6,7 @@
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
#include "rda8810pl.dtsi"
/ {
@@ -27,6 +28,13 @@ memory@...00000 {
reg = <0x80000000 0x10000000>;
};
+ vdd_sdmmc: regulator-fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_sdmmc";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
uart_clk: uart-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
@@ -34,6 +42,18 @@ uart_clk: uart-clk {
};
};
+&mmc1 {
+ status = "okay";
+ no-sdio;
+ no-mmc;
+ bus-width = <4>;
+ max-frequency = <30000000>;
+ cd-gpios = <&gpiob 4 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vdd_sdmmc>;
+ rda,mclk-adj = /bits/ 8 <1>;
+ rda,mclk-inv;
+};
+
&uart1 {
status = "okay";
clocks = <&uart_clk>;
diff --git a/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-i96.dts b/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-i96.dts
index 728f76931b995fdfc036b586f899b15a7f07528b..cf4b75f114b33b27fad0ead4951b15abb1f5cabd 100644
--- a/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-i96.dts
+++ b/arch/arm/boot/dts/unisoc/rda8810pl-orangepi-i96.dts
@@ -6,6 +6,7 @@
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
#include "rda8810pl.dtsi"
/ {
@@ -27,6 +28,13 @@ memory@...00000 {
reg = <0x80000000 0x10000000>;
};
+ vdd_sdmmc: regulator-fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_sdmmc";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
uart_clk: uart-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
@@ -34,6 +42,18 @@ uart_clk: uart-clk {
};
};
+&mmc1 {
+ status = "okay";
+ no-sdio;
+ no-mmc;
+ bus-width = <4>;
+ max-frequency = <30000000>;
+ cd-gpios = <&gpiob 4 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vdd_sdmmc>;
+ rda,mclk-adj = /bits/ 8 <1>;
+ rda,mclk-inv;
+};
+
&uart1 {
status = "okay";
clocks = <&uart_clk>;
diff --git a/arch/arm/boot/dts/unisoc/rda8810pl.dtsi b/arch/arm/boot/dts/unisoc/rda8810pl.dtsi
index f30d6ece49fb33d9c5c3ad9522c83bb8e4f8b488..438be79a89060655e4a12edc6d3c42574748108b 100644
--- a/arch/arm/boot/dts/unisoc/rda8810pl.dtsi
+++ b/arch/arm/boot/dts/unisoc/rda8810pl.dtsi
@@ -7,6 +7,8 @@
*/
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/rda,8810pl-apclk.h>
+#include <dt-bindings/dma/rda-ifc.h>
/ {
compatible = "rda,8810pl";
@@ -39,7 +41,7 @@ modem@...00000 {
#size-cells = <1>;
ranges = <0x0 0x10000000 0xfffffff>;
- gpioc@...8000 {
+ gpioc: gpioc@...8000 {
compatible = "rda,8810pl-gpio";
reg = <0x1a08000 0x1000>;
gpio-controller;
@@ -68,6 +70,13 @@ apb@...00000 {
#size-cells = <1>;
ranges = <0x0 0x20900000 0x100000>;
+ ap_syscon: syscon@0 {
+ compatible = "rda,8810pl-apsyscon", "syscon";
+ reg = <0x0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
timer@...00 {
compatible = "rda,8810pl-timer";
reg = <0x10000 0x1000>;
@@ -76,7 +85,7 @@ timer@...00 {
interrupt-names = "hwtimer", "ostimer";
};
- gpioa@...00 {
+ gpioa: gpioa@...00 {
compatible = "rda,8810pl-gpio";
reg = <0x30000 0x1000>;
gpio-controller;
@@ -87,7 +96,7 @@ gpioa@...00 {
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
};
- gpiob@...00 {
+ gpiob: gpiob@...00 {
compatible = "rda,8810pl-gpio";
reg = <0x31000 0x1000>;
gpio-controller;
@@ -98,7 +107,7 @@ gpiob@...00 {
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
};
- gpiod@...00 {
+ gpiod: gpiod@...00 {
compatible = "rda,8810pl-gpio";
reg = <0x32000 0x1000>;
gpio-controller;
@@ -123,6 +132,30 @@ uart1: serial@0 {
status = "disabled";
};
+ mmc1: mmc@...00 {
+ compatible = "rda,8810pl-mmc", "rda,mmc";
+ reg = <0x50000 0x1000>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ap_syscon CLK_APB2>;
+ clock-names = "mclk";
+ resets = <&ap_syscon RST_APB2_SDMMC1>;
+ dmas = <&ifc IFC_SDMMC1_TX>, <&ifc IFC_SDMMC1_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ mmc2: mmc@...00 {
+ compatible = "rda,8810pl-mmc", "rda,mmc";
+ reg = <0x60000 0x1000>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ap_syscon CLK_APB2>;
+ clock-names = "mclk";
+ resets = <&ap_syscon RST_APB2_SDMMC2>;
+ dmas = <&ifc IFC_SDMMC2_TX>, <&ifc IFC_SDMMC2_RX>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
uart2: serial@...00 {
compatible = "rda,8810pl-uart";
reg = <0x10000 0x1000>;
@@ -136,6 +169,12 @@ uart3: serial@...00 {
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
+ ifc: dma-controller@...00 {
+ compatible = "rda,8810pl-ifc", "rda,ifc";
+ reg = <0xf0000 0x1000>;
+ #dma-cells = <1>;
+ };
};
l2: cache-controller@...00000 {
--
2.51.0
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