linux-kernel - Re: [PATCH v3] soc: tegra: fuse: speedo-tegra210: Update speedo ids

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Message-ID: <2334a545-9a06-42d9-8282-674b94fdcb2f@nvidia.com>
Date: Thu, 18 Sep 2025 10:45:37 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: webgeek1234@...il.com, Thierry Reding <thierry.reding@...il.com>,
 Joseph Lo <josephl@...dia.com>, Stephen Boyd <sboyd@...nel.org>
Cc: Thierry Reding <treding@...dia.com>, linux-tegra@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] soc: tegra: fuse: speedo-tegra210: Update speedo ids


On 04/09/2025 02:58, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling <webgeek1234@...il.com>
> 
> Existing code only sets cpu and gpu speedo ids 0 and 1. The cpu dvfs
> code supports 11 ids and nouveau supports 5. This aligns with what the
> downstream vendor kernel supports. Align skus with the downstream list.

Do you have a reference for the downstream kernel change you are 
referring to? I have found this change [0]. However, this does not quite 
align with what you have in this patch.

Jon

[0] 
https://nv-tegra.nvidia.com/r/plugins/gitiles/linux-5.10/+/2a8660e3d1e4f75ba4390b72991744174237b025%5E%21/#F0

-- 
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