linux-kernel - Re: [PATCH v4 4/6] arm64: dts: renesas: rzg3s-smarc-som: Update dma-ranges for PCIe

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Message-ID: <c2fc5f6b-0e7c-464e-89a6-35dc76177d18@tuxon.dev>
Date: Thu, 18 Sep 2025 12:47:40 +0300
From: Claudiu Beznea <claudiu.beznea@...on.dev>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: bhelgaas@...gle.com, lpieralisi@...nel.org, kwilczynski@...nel.org,
 mani@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 magnus.damm@...il.com, p.zabel@...gutronix.de, linux-pci@...r.kernel.org,
 linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org,
 Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
 Wolfram Sang <wsa+renesas@...g-engineering.com>
Subject: Re: [PATCH v4 4/6] arm64: dts: renesas: rzg3s-smarc-som: Update
 dma-ranges for PCIe

Hi, Geert,

On 9/18/25 12:09, Geert Uytterhoeven wrote:
> Hi Claudiu,
> 
> On Fri, 12 Sept 2025 at 14:24, Claudiu <claudiu.beznea@...on.dev> wrote:
>> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>>
>> The first 128MB of memory is reserved on this board for secure area.
>> Secure area is a RAM region used by firmware. The rzg3s-smarc-som.dtsi
>> memory node (memory@...00000) excludes the secure area.
>> Update the PCIe dma-ranges property to reflect this.
>>
>> Tested-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> 
> Thanks for your patch!
> 
>> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
>> @@ -214,6 +214,16 @@ &sdhi2 {
>>  };
>>  #endif
>>
>> +&pcie {
>> +       /* First 128MB is reserved for secure area. */
> 
> Do you really have to take that into account here?  I believe that
> 128 MiB region will never be used anyway, as it is excluded from the
> memory map (see memory@...00000).
> 
>> +       dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0x0 0x38000000>;
> 
> Hence shouldn't you add
> 
>     dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0x0 0x38000000>;
> 
> to the pcie node in arch/arm64/boot/dts/renesas/r9a08g045s33.dtsi
> instead, like is done for all other Renesas SoCs that have PCIe?

I chose to add it here as the rzg3s-smarc-som.dtsi is the one that defines
the available memory for board, as the available memory is something board
dependent.

If you consider it is better to have it in the SoC file, please let me know.

> 
>> +};
>> +
>> +&pcie_port0 {
>> +       clocks = <&versa3 5>;
>> +       clock-names = "ref";
>> +};
> 
> This is not related.

Ah, right! Could you please let me know if you prefer to have another patch
or to update the patch description?

Thank you,
Claudiu

> 
>> +
>>  &pinctrl {
>>  #if SW_CONFIG3 == SW_ON
>>         eth0-phy-irq-hog {
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
>