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Message-ID: <c5d5c026-3240-4828-b9b3-455f057fb041@oss.qualcomm.com>
Date: Thu, 18 Sep 2025 12:27:12 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Md Sadre Alam <quic_mdalam@...cinc.com>, broonie@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
andersson@...nel.org, konradybcio@...nel.org, vkoul@...nel.org,
linux-arm-msm@...r.kernel.org, linux-spi@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
dmaengine@...r.kernel.org
Cc: quic_varada@...cinc.com
Subject: Re: [PATCH 3/9] dma: qcom: bam_dma: Fix command element mask field
for BAM v1.6.0+
On 9/18/25 11:40 AM, Md Sadre Alam wrote:
> BAM version 1.6.0 and later changed the behavior of the mask field in
> command elements for read operations. In newer BAM versions, the mask
> field for read commands contains the upper 4 bits of the destination
> address to support 36-bit addressing, while for write commands it
> continues to function as a traditional write mask.
So the hardware can read from higher addresses but not write to them?
Plus, you didn't explain what the mask register does on BAM <1.6.0.
If it really masks the address, all reads will now point to 0x0
Konrad
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