linux-kernel - Re: [PATCH v9 03/10] x86,fs/resctrl: Detect io

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Message-ID: <f45a8fbc-6639-40a4-ba40-3a7a9c680fc7@amd.com>
Date: Fri, 19 Sep 2025 11:53:58 -0500
From: "Moger, Babu" <bmoger@....com>
To: Reinette Chatre <reinette.chatre@...el.com>,
 Babu Moger <babu.moger@....com>, corbet@....net, tony.luck@...el.com,
 Dave.Martin@....com, james.morse@....com, tglx@...utronix.de,
 mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com
Cc: x86@...nel.org, hpa@...or.com, kas@...nel.org,
 rick.p.edgecombe@...el.com, akpm@...ux-foundation.org, paulmck@...nel.org,
 pmladek@...e.com, pawan.kumar.gupta@...ux.intel.com, rostedt@...dmis.org,
 kees@...nel.org, arnd@...db.de, fvdl@...gle.com, seanjc@...gle.com,
 thomas.lendacky@....com, manali.shukla@....com, perry.yuan@....com,
 sohil.mehta@...el.com, xin@...or.com, peterz@...radead.org,
 mario.limonciello@....com, gautham.shenoy@....com, nikunj@....com,
 dapeng1.mi@...ux.intel.com, ak@...ux.intel.com, chang.seok.bae@...el.com,
 ebiggers@...gle.com, linux-doc@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-coco@...ts.linux.dev, kvm@...r.kernel.org
Subject: Re: [PATCH v9 03/10] x86,fs/resctrl: Detect io_alloc feature

Hi Reinette,

On 9/18/2025 12:15 AM, Reinette Chatre wrote:
> Hi Babu,
> 
> On 9/2/25 3:41 PM, Babu Moger wrote:
>> Smart Data Cache Injection (SDCI) is a mechanism that enables direct
>> insertion of data from I/O devices into the L3 cache. It can reduce the
>> demands on DRAM bandwidth and reduces latency to the processor consuming
>> the I/O data.
> 
> This copy&pasted text found in cover letter and patch 1 and now here seems to be the
> type of annoying repetitive text that Boris referred to [1]. Looking at this changelog
> again it may also be confusing to start with introduction of one feature (SDCI), but
> end with another SDCIAE.
> 
> Here is a changelog that attempts to address issues, please feel free to improve:
> 
> 	AMD's SDCIAE (SDCI Allocation Enforcement) PQE feature enables system software
> 	to control the portions of L3 cache used for direct insertion of data from
> 	I/O devices into the L3 cache.
>                                                                                  
> 	Introduce a generic resctrl cache resource property "io_alloc_capable" as the
> 	first part of the new "io_alloc" resctrl feature that will support AMD's
> 	SDCIAE.	Any architecture can set a cache resource as "io_alloc_capable" if a
> 	portion	of the cache can be allocated for I/O traffic.
>                                                                                  
> 	Set the "io_alloc_capable" property for the L3 cache resource on x86
> 	(AMD) systems that support SDCIAE.
> 
>   

Looks good. thank you.

>> Introduce cache resource property "io_alloc_capable" that an architecture
>> can set if a portion of the cache can be allocated for I/O traffic.
>>
>> Set this property on x86 systems that support SDCIAE (L3 Smart Data Cache
>> Injection Allocation Enforcement). This property is set only for the L3
>> cache resource on systems that support SDCIAE.
>>
>> Signed-off-by: Babu Moger <babu.moger@....com>
>> Reviewed-by: Reinette Chatre <reinette.chatre@...el.com>
>> ---
> 
> Reinette
> 
> 
> [1] https://lore.kernel.org/lkml/20250911150850.GAaMLmAoi5fTIznQzY@fat_crate.local/
> 
>