[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <45d5995a-a0f7-4b88-82ea-21169a2c94ef@oracle.com>
Date: Fri, 19 Sep 2025 22:33:07 +0530
From: ALOK TIWARI <alok.a.tiwari@...cle.com>
To: Vincent Guittot <vincent.guittot@...aro.org>, chester62515@...il.com,
mbrugger@...e.com, ghennadi.procopciuc@....nxp.com, s32@....com,
bhelgaas@...gle.com, jingoohan1@...il.com, lpieralisi@...nel.org,
kwilczynski@...nel.org, mani@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, Ionut.Vicovan@....com,
larisa.grigore@....com, Ghennadi.Procopciuc@....com,
ciprianmarian.costea@....com, bogdan.hamciuc@....com, Frank.li@....com,
linux-arm-kernel@...ts.infradead.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
imx@...ts.linux.dev
Cc: cassel@...nel.org
Subject: Re: [External] : [PATCH 2/3 v2] PCI: s32g: Add initial PCIe support
(RC)
On 9/19/2025 9:28 PM, Vincent Guittot wrote:
> +#define CC_1_MEMTYPE_BOUNDARY_MASK GENMASK(31, 2)
> +#define CC_1_MEMTYPE_BOUNDARY(x) FIELD_PREP(CC_1_MEMTYPE_BOUNDARY_MASK, x)
> +#define CC_1_MEMTYPE_VALUE BIT(0)
> +#define CC_1_MEMTYPE_LOWER_PERIPH 0x0
> +#define CC_1_MEMTYPE_LOWER_MEM 0x1
> +
> +#endif /* PCI_S32G_REGS_H */
typo -> PCIE_S32G_REGS_H
> diff --git a/drivers/pci/controller/dwc/pcie-s32g.c b/drivers/pci/controller/dwc/pcie-s32g.c
> new file mode 100644
> index 000000000000..995e4593a13e
> --- /dev/null
> +++ b/drivers/pci/controller/dwc/pcie-s32g.c
Thanks,
Alok
Powered by blists - more mailing lists