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Message-Id: <20250919-sm6350-mdss-reset-v1-1-48dcac917c73@fairphone.com> Date: Fri, 19 Sep 2025 11:57:23 +0200 From: Luca Weiss <luca.weiss@...rphone.com> To: Bjorn Andersson <andersson@...nel.org>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Konrad Dybcio <konradybcio@...nel.org> Cc: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, Luca Weiss <luca.weiss@...rphone.com> Subject: [PATCH 1/3] dt-bindings: clock: dispcc-sm6350: Add MDSS_CORE & MDSS_RSCC resets Add the indexes for two resets inside the dispcc on SM6350 SoC. Signed-off-by: Luca Weiss <luca.weiss@...rphone.com> --- include/dt-bindings/clock/qcom,dispcc-sm6350.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/qcom,dispcc-sm6350.h b/include/dt-bindings/clock/qcom,dispcc-sm6350.h index cb54aae2723e8f20ff3eebde3e15e862be750712..61426a80e620ac795b6f0ccda173654d7e47e59d 100644 --- a/include/dt-bindings/clock/qcom,dispcc-sm6350.h +++ b/include/dt-bindings/clock/qcom,dispcc-sm6350.h @@ -42,6 +42,10 @@ #define DISP_CC_SLEEP_CLK 31 #define DISP_CC_XO_CLK 32 +/* Resets */ +#define DISP_CC_MDSS_CORE_BCR 0 +#define DISP_CC_MDSS_RSCC_BCR 1 + /* GDSCs */ #define MDSS_GDSC 0 -- 2.51.0
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