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Message-ID: <20250919000020.16969-6-andre.przywara@arm.com>
Date: Fri, 19 Sep 2025 01:00:20 +0100
From: Andre Przywara <andre.przywara@....com>
To: Lee Jones <lee@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: devicetree@...r.kernel.org,
linux-sunxi@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Mikhail Kalashnikov <iuncuim@...il.com>
Subject: [RFC PATCH 5/5] arm64: dts: allwinner: a523: Mark dual-phased regulators
The X-Powers AXP323 PMIC on the boards with a SoC from the Allwinner
A523 family typically uses DCDC1 and DCDC2 in a dual-phase setup to
supply the "big" CPU cluster. For some reason this dual-phase
configuration is not the PMIC's reset default, but needs to be actively
programmed at runtime.
Add the newly introduced x-powers,polyphased property in the board DTs,
to mark this connection and let drivers program the dual-phase setup.
Signed-off-by: Andre Przywara <andre.przywara@....com>
---
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 5 ++++-
arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts | 5 ++++-
arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 5 ++++-
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts | 5 ++++-
4 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
index 4ad91b6f01d34..a51446482927c 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
@@ -269,9 +269,12 @@ reg_dcdc1_323: dcdc1 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1160000>;
regulator-name = "vdd-cpub";
+ x-powers,polyphased = <®_dcdc2_323>;
};
- /* DCDC2 is polyphased with DCDC1 */
+ reg_dcdc2_323: dcdc2 {
+ /* dual-phased with DCDC1 */
+ };
/* RISC-V management core supply */
reg_dcdc3_323: dcdc3 {
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
index 68c5765c2e919..848b5abb4203f 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
@@ -285,9 +285,12 @@ reg_dcdc1_323: dcdc1 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1160000>;
regulator-name = "vdd-cpub";
+ x-powers,polyphased = <®_dcdc2_323>;
};
- /* DCDC2 is polyphased with DCDC1 */
+ reg_dcdc2_323: dcdc2 {
+ /* dual-phased with DCDC1 */
+ };
reg_dcdc3_323: dcdc3 {
regulator-always-on;
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
index 7b7ef54ec7684..ec69b409ac47f 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
@@ -291,9 +291,12 @@ reg_dcdc1_323: dcdc1 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1160000>;
regulator-name = "vdd-cpub";
+ x-powers,polyphased = <®_dcdc2_323>;
};
- /* DCDC2 is polyphased with DCDC1 */
+ reg_dcdc2_323: dcdc2 {
+ /* dual-phased with DCDC1 */
+ };
/* Some RISC-V management core related voltage */
reg_dcdc3_323: dcdc3 {
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
index d07bb9193b438..e9e6d85fb84f7 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
@@ -322,9 +322,12 @@ reg_dcdc1_323: dcdc1 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1150000>;
regulator-name = "vdd-cpub";
+ x-powers,polyphased = <®_dcdc2_323>;
};
- /* DCDC2 is polyphased with DCDC1 */
+ reg_dcdc2_323: dcdc2 {
+ /* dual-phased with DCDC1 */
+ };
/* Some RISC-V management core related voltage */
reg_dcdc3_323: dcdc3 {
--
2.46.4
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