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Message-Id: <20250919-sm7150-dispcc-fixes-v1-1-308ad47c5fce@mainlining.org> Date: Fri, 19 Sep 2025 14:34:30 +0200 From: Jens Reidel <adrian@...nlining.org> To: Bjorn Andersson <andersson@...nel.org>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Danila Tikhonov <danila@...xyga.com>, David Wronek <david@...nlining.org> Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, phone-devel@...r.kernel.org, linux@...nlining.org, ~postmarketos/upstreaming@...ts.sr.ht, Jens Reidel <adrian@...nlining.org> Subject: [PATCH 1/3] dt-bindings: clock: sm7150-dispcc: Add MDSS_CORE reset Add the index for a reset inside the dispcc on SM7150 SoC. Signed-off-by: Jens Reidel <adrian@...nlining.org> --- include/dt-bindings/clock/qcom,sm7150-dispcc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/clock/qcom,sm7150-dispcc.h b/include/dt-bindings/clock/qcom,sm7150-dispcc.h index fc1fefe8fd7248bb160816cebb8cc4c51615a8dc..1e4e6432d5065b1dd3daed5b382732c9c9c09444 100644 --- a/include/dt-bindings/clock/qcom,sm7150-dispcc.h +++ b/include/dt-bindings/clock/qcom,sm7150-dispcc.h @@ -53,6 +53,9 @@ #define DISPCC_SLEEP_CLK 41 #define DISPCC_SLEEP_CLK_SRC 42 +/* DISPCC resets */ +#define DISPCC_MDSS_CORE_BCR 0 + /* DISPCC GDSCR */ #define MDSS_GDSC 0 -- 2.51.0
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