linux-kernel - Re: [TECH TOPIC] Reaching consensus on CONFIG

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Message-Id: <547dcb81-434d-4910-aa7c-1d69019fcb3d@app.fastmail.com>
Date: Fri, 19 Sep 2025 16:22:20 +0200
From: "Arnd Bergmann" <arnd@...db.de>
To: "Geert Uytterhoeven" <geert@...ux-m68k.org>
Cc: "Jason Gunthorpe" <jgg@...dia.com>, ksummit@...ts.linux.dev,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linuxppc-dev@...ts.ozlabs.org, linux-mips@...r.kernel.org,
 linux-mm@...ck.org, imx@...ts.linux.dev,
 "Christophe Leroy" <christophe.leroy@...roup.eu>,
 "Richard Weinberger" <richard@....at>,
 "Lucas Stach" <l.stach@...gutronix.de>,
 "Linus Walleij" <linus.walleij@...aro.org>,
 "Geert Uytterhoeven" <geert+renesas@...der.be>,
 "Ankur Arora" <ankur.a.arora@...cle.com>,
 "David Hildenbrand" <david@...hat.com>,
 "Mike Rapoport" <rppt@...nel.org>,
 "Lorenzo Stoakes" <lorenzo.stoakes@...cle.com>,
 "Matthew Wilcox" <willy@...radead.org>,
 "Andrew Morton" <akpm@...ux-foundation.org>,
 "Liam R. Howlett" <Liam.Howlett@...cle.com>,
 "Vlastimil Babka" <vbabka@...e.cz>,
 "Suren Baghdasaryan" <surenb@...gle.com>,
 "Ira Weiny" <ira.weiny@...el.com>, "Nishanth Menon" <nm@...com>,
 Heiko Stübner <heiko@...ech.de>,
 "Alexander Sverdlin" <alexander.sverdlin@...il.com>,
 "Chester A. Unal" <chester.a.unal@...nc9.com>,
 "Sergio Paracuellos" <sergio.paracuellos@...il.com>,
 "Andreas Larsson" <andreas@...sler.com>
Subject: Re: [TECH TOPIC] Reaching consensus on CONFIG_HIGHMEM phaseout

On Fri, Sep 19, 2025, at 09:17, Geert Uytterhoeven wrote:
> On Thu, 18 Sept 2025 at 15:13, Arnd Bergmann <arnd@...db.de> wrote:
>> On Wed, Sep 17, 2025, at 14:59, Jason Gunthorpe wrote:
>> > On Tue, Sep 09, 2025 at 11:23:37PM +0200, Arnd Bergmann wrote:
>
>> * Microchip SAM9x7 is the newest ARMv5 chip, clearly does
>>   get kernel updates, and the only one I can think of with
>>   DDR3 support, but seems to be limited to 256MB total memory.
>
> Are they limited to DDR3?
>
> IIRC, someone (you? ;-) told me at ELCE that Microchip keeps on spinning
> new variants of old SoCs, to accommodate the changing DDR landscape
> and market.  So perhaps they also accept larger RAM sizes?

Yes, that was me. The previous SAM9x60 was released in 2020
and I think that one was an upgrade to a smaller process node,
raising the clock frequency to 600MHz and adding more modern
peripherals, but I see now that this used the same SDRAM/LPDDR/DDR2
memory controller as previous chips, with a limit of 128MB
total DRAM.

SAM9X7 in 2023 added DDR3 mode with up to 256MB according to
the datasheet, no idea why they chose not to support more,
since a 32-bit wide DDR3 bus should allow up to 1GB with two
256Mbit x16 chips that are widely available, or even more using
expensive 512Mbit x16 or 1Gbit x8 chips.

       Arnd