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Message-ID: <3bcca945-b74e-42a0-bf42-24d01068d246@baylibre.com>
Date: Sat, 20 Sep 2025 09:53:28 -0500
From: David Lechner <dlechner@...libre.com>
To: Jonathan Cameron <jic23@...nel.org>
Cc: Michael Hennerich <Michael.Hennerich@...log.com>,
Nuno Sá <nuno.sa@...log.com>,
Andy Shevchenko <andy@...nel.org>, linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] iio: adc: ad7124: change setup reg allocation strategy
On 9/20/25 6:24 AM, Jonathan Cameron wrote:
> On Wed, 17 Sep 2025 17:05:01 -0500
> David Lechner <dlechner@...libre.com> wrote:
>
>> Change the allocation strategy of the 8 SETUP registers from a least-
>> recently-used (LRU) to a first-come-first-served basis.
>>
>> The AD7124 chips can have up to 16 channels enabled at a time in the
>> sequencer for buffered reads, but only have 8 SETUP configurations
>> (namely the OFFSET, GAIN, CONFIG and FILTER registers) that must be
>> shared among the 16 channels. This means some of the channels must use
>> the exact same configuration parameters so that they can share a single
>> SETUP group of registers. The previous LRU strategy did not keep track
>> of how many different configurations were requested at the same time,
>> so if there were more than 8 different configurations requested, some
>> channels would end up using the incorrect configuration because the slot
>> assigned to them would also be assigned to a different configuration
>> that wrote over it later.
>>
>> Adding such tracking to solve this would make an already complex
>> algorithm even more complex. Instead we can replace it with a simpler
>> first-come-first-serve strategy. This makes it easy to track how many
>> different configurations are being requested at the same time. This
>> comes at the expense of slightly longer setup times for buffered reads
>> since all setup registers must be written each time when a buffered read
>> is enabled. But this is generally not considered a hot path where
>> performance is critical, so should be acceptable.
>
> If I read this correctly, ever time we call postenable()
> this parses the channels enabled and first checks if an existing cfg
> is usable, if not assigns the first unused slot.
>
> If so, the algorithm is a little more complex than it needs to be because
> it is allowing for holes in the used cfg registers that I don't think
> can occur.
Yes, Nuno noticed this too and had a suggestion on how to simplify it.
>
> So if we add simple cfg_slots_used variable we can for example jump directly
> to the next unused slot if we don't find a match and we can use this
> as the loop limit to save on checking a bunch of zeros after that aren't
> in use.
There are only 8 available config slots, so I didn't consider such
optimization. But we could perhaps do this even without adding an
extra variable.
>
> Maybe I'm missing something?
>
> In general the approach you have here feels sensible.
>
> Jonathan
>
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