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Message-Id: <DCXPZ9JSN7H2.3B76IQI8N4O6H@cknow.org>
Date: Sat, 20 Sep 2025 17:07:01 +0200
From: "Diederik de Haas" <didi.debian@...ow.org>
To: "Detlev Casanova" <detlev.casanova@...labora.com>,
<linux-kernel@...r.kernel.org>
Cc: "Mauro Carvalho Chehab" <mchehab@...nel.org>, "Heiko Stuebner"
<heiko@...ech.de>, <linux-media@...r.kernel.org>,
<linux-rockchip@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>, <kernel@...labora.com>
Subject: Re: [PATCH v2 11/12] media: rkvdec: Add HEVC support for the
VDPU381 variant
Hi again,
I think I've found a similar issue here as I did for H264.
On Fri Aug 8, 2025 at 10:03 PM CEST, Detlev Casanova wrote:
> The VDPU381 supports HEVC decoding up to 7680x4320@...ps.
> It could double that when using both decoder cores.
>
> It support YUV420 (8 and 10 bits) as well as AFBC (not implemented
> here)
>
> The fluster score is 146/147 for JCT-VC-HEVC_V1, tested on ROCK 5B.
> None of the other test suites works.
>
> Signed-off-by: Detlev Casanova <detlev.casanova@...labora.com>
> ---
> .../media/platform/rockchip/rkvdec/Kconfig | 1 +
> .../media/platform/rockchip/rkvdec/Makefile | 2 +
> .../platform/rockchip/rkvdec/rkvdec-cabac.c | 3435 +++++++++++++++++
> .../rockchip/rkvdec/rkvdec-hevc-common.c | 546 +++
> .../rockchip/rkvdec/rkvdec-hevc-common.h | 101 +
> .../rockchip/rkvdec/rkvdec-vdpu381-hevc.c | 596 +++
> .../media/platform/rockchip/rkvdec/rkvdec.c | 81 +
> .../media/platform/rockchip/rkvdec/rkvdec.h | 1 +
> 8 files changed, 4763 insertions(+)
> create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c
> create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h
> create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c
>
> diff --git a/drivers/media/platform/rockchip/rkvdec/Kconfig b/drivers/media/platform/rockchip/rkvdec/Kconfig
> index 5f3bdd848a2cf..3303b0ce32809 100644
> --- a/drivers/media/platform/rockchip/rkvdec/Kconfig
> +++ b/drivers/media/platform/rockchip/rkvdec/Kconfig
> @@ -8,6 +8,7 @@ config VIDEO_ROCKCHIP_VDEC
> select VIDEOBUF2_VMALLOC
> select V4L2_MEM2MEM_DEV
> select V4L2_H264
> + select V4L2_HEVC
> select V4L2_VP9
> help
> Support for the Rockchip Video Decoder IP present on Rockchip SoCs,
>
> ...
>
> diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
> index dab34a2322c95..cd01f1e41beb5 100644
> --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
> +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
> @@ -257,6 +257,60 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
> .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs),
> };
>
> +static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = {
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS,
> + },
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_SPS,
> + .cfg.ops = &rkvdec_ctrl_ops,
> + },
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_PPS,
> + },
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX,
> + },
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_MODE,
> + .cfg.min = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
> + .cfg.max = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
> + .cfg.def = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
> + },
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_START_CODE,
> + .cfg.min = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
> + .cfg.def = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
> + .cfg.max = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
> + },
> + {
> + .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> + .cfg.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> + .cfg.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,
> + .cfg.menu_skip_mask =
> + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE),
> + .cfg.def = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> + },
> + {
> + .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> + .cfg.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> + .cfg.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1,
> + },
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS,
> + .cfg.dims = { 65 },
> + },
> + {
> + .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS,
> + .cfg.dims = { 65 },
> + },
> +};
> +
> +static const struct rkvdec_ctrls rkvdec_hevc_ctrls = {
> + .ctrls = rkvdec_hevc_ctrl_descs,
> + .num_ctrls = ARRAY_SIZE(rkvdec_hevc_ctrl_descs),
> +};
> +
> static const struct rkvdec_decoded_fmt_desc rkvdec_h264_decoded_fmts[] = {
> {
> .fourcc = V4L2_PIX_FMT_NV12,
> @@ -276,6 +330,17 @@ static const struct rkvdec_decoded_fmt_desc rkvdec_h264_decoded_fmts[] = {
> },
> };
>
> +static const struct rkvdec_decoded_fmt_desc rkvdec_hevc_decoded_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_NV12,
> + .image_fmt = RKVDEC_IMG_FMT_420_8BIT,
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_NV15,
> + .image_fmt = RKVDEC_IMG_FMT_420_10BIT,
> + },
> +};
> +
> static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = {
> {
> .cfg.id = V4L2_CID_STATELESS_VP9_FRAME,
> @@ -354,6 +419,22 @@ static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] = {
> .decoded_fmts = rkvdec_h264_decoded_fmts,
> .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
> },
> + {
> + .fourcc = V4L2_PIX_FMT_HEVC_SLICE,
> + .frmsize = {
> + .min_width = 16,
> + .max_width = 65472,
> + .step_width = 16,
> + .min_height = 16,
> + .max_height = 65472,
> + .step_height = 16,
> + },
In the RK3588 TRM Part 1 paragraph 5.4.3, I see "Supported image size" :
64x64 to 65472x65472; step size 16 pixels
So I think .min_width and .min_height should be 64, not 16.
Cheers,
Diederik
> + .ctrls = &rkvdec_hevc_ctrls,
> + .ops = &rkvdec_vdpu381_hevc_fmt_ops,
> + .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
> + .decoded_fmts = rkvdec_hevc_decoded_fmts,
> + .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
> + },
> };
>
> static const struct rkvdec_coded_fmt_desc vdpu383_coded_fmts[] = {
> diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
> index acb9d72b130bb..df56bc0516ac9 100644
> --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h
> +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
> @@ -173,6 +173,7 @@ extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops;
>
> /* VDPU381 ops */
> extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops;
> +extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_hevc_fmt_ops;
>
> /* VDPU383 ops */
> extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu383_h264_fmt_ops;
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