Message-ID: <cb04a4ec-c643-4b80-9288-8fd8944cb4f7@ti.com>
Date: Sat, 20 Sep 2025 23:25:31 +0530
From: Santhosh Kumar K <s-k6@...com>
To: Miquel Raynal <miquel.raynal@...tlin.com>
CC: <richard@....at>, <vigneshr@...com>, <broonie@...nel.org>,
        <tudor.ambarus@...aro.org>, <pratyush@...nel.org>, <mwalle@...nel.org>,
        <p-mantena@...com>, <linux-spi@...r.kernel.org>,
        <linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <a-dutta@...com>, <u-kumar1@...com>, <praneeth@...com>, <s-k6@...com>
Subject: Re: [RFC PATCH 01/10] spi: spi-mem: Introduce support for tuning
 controller

Hello,

On 10/09/25 13:51, Miquel Raynal wrote:
> On 12/08/2025 at 01:02:10 +0530, Santhosh Kumar K <s-k6@...com> wrote:
> 
>> From: Pratyush Yadav <pratyush@...nel.org>
>>
>> Some controllers like the Cadence OSPI controller need to perform a
>> tuning sequence to operate at high data rates. Tuning is needs to happen
>> once the device is switched to appropriate mode (say 8S-8S-8S or
>> 8D-8D-8D).

Apologies for the delay in response - I started prototyping new solution
based on our discussions earlier, which took some additional time.

> 
> This is actually wrong. Tuning is way more generic than that :)
> 
> If someone wants to use a chip at a high frequency (50MHz in your case,
> but whatever, there is a threshold above which additional care must be
> taken), it must go through the calibration step. It does not matter in
> which mode you are. Calibration would still be relevant in single SDR
> mode.
> 
> 
> This 50MHz bothered Mark because it is too Cadence specific. Maybe this
> should be a controller parameter? If the spi-mem core (or even the spi
> core, by extensino) sees that the design allows running at XMHz (due to
> the SPI peripheral properties or simply the absence of any limitation),
> and if the controller states that it requires an extra tuning step above
> YMHz (and X > Y), then it launches the calibration.
> 
>  From a core perspective, I would like the calibration hook to be as
> simple as possible, because what "calibration" means is highly
> controller and chip specific.

I understand the concern here.

Let me point out the options for launching the tuning procedure, along
with the issues in each approach.

Option 1: Launch tuning as part of spi_mem_exec_op()
    - After spi_mem_access_start(), introduce a spi_mem_needs_tuning()
check (a new callback to SPI MEM controller) to check whether the
current op requires tuning
    - If yes, we call spi_mem_execute_tuning()
         - on success, mark tuning complete in a flag within SPI MEM
Controller private data
         - on failure, we attempt a fallback by calling
spi_mem_adjust_op_freq() and drop to a lower supported frequency

Option 2: Launch tuning within spi_controller->exec_op() implementation
    - Very similar to option 1, except that the spi_mem_execute_tuning()
is triggered from within the controller's exec_op() implementation
(no need for spi_mem_needs_tuning())

Drawbacks in option 1 and 2:
    - Tuning requires multiple reads of a known pattern, but the flash
may not always be in a state to allow read commands
    - No fallback on failures, can't make flash-specific adjustments in
case of a tuning failure
    - No access to write_op() to write known pattern temporarily to an
on-die cache. Pattern needs to be always burnt into the flash

    - Plus, in option 2 - we can't call spi_mem_adjust_op_freq()

While the need for tuning is dictated by Controller specific
characteristics the ops (and state of the chip) required to complete
tuning is under the control of spi-mem users (spi-nand/spi-nor).
So, it's impossible to achieve tuning without the help of spi-mem users.

So, Option 3: Launch from SPI MEM clients
                           (mtd/nand/spi or mtd/spi-nor, etc.,)
    - Once the spi-mem chip is completely enumerated and best read and
write ops are chosen call spi_mem_needs_tuning(read_op, write_op) as
a part of .probe()
    - If tuning is required, call
spi_mem_execute_tuning(read_op, write_op)
         - If only read_op is provided, it implies the tuning pattern is
pre-flashed to the partition
    - On tuning failure, retry by re-running spi_mem_needs_tuning() with
the second best set of ops (max throughput - 1)

With option 3, spi_mem users are limited to calling
spi_mem_needs_tuning() and spi_mem_execute_tuning(). Rest is hidden
within the controller drivers. If spi-mem users change read/write ops,
the above sequence can be re-issued.

The controller can store the read_op and write_op in case of a tuning
success and periodically re-run tuning, ensuring we always have valid
tuning parameters.

One concern with option 3 is that we may not be able to make use of
static data on certain flash as tuning patterns (like reading parameter
page or SFDP table for tuning instead of controller specific attack
patterns).

Please let me know your thoughts on which of these directions makes the
most sense.

Thanks,
Santhosh.

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