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Message-ID: <175847362784.4354.9605164942435120239@lazor>
Date: Sun, 21 Sep 2025 09:53:47 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Laura Nao <laura.nao@...labora.com>, angelogioacchino.delregno@...labora.com, conor+dt@...nel.org, krzk+dt@...nel.org, matthias.bgg@...il.com, mturquette@...libre.com, p.zabel@...gutronix.de, richardcochran@...il.com, robh@...nel.org
Cc: guangjie.song@...iatek.com, wenst@...omium.org, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org, kernel@...labora.com, Laura Nao <laura.nao@...labora.com>, NĂcolas F . R . A . Prado <nfraprado@...labora.com>, Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v6 09/27] dt-bindings: clock: mediatek: Describe MT8196 clock controllers
Quoting Laura Nao (2025-09-15 08:19:29)
> Introduce binding documentation for system clocks, functional clocks,
> and PEXTP0/1 and UFS reset controllers on MediaTek MT8196.
>
> This binding also includes a handle to the hardware voter, a
> fixed-function MCU designed to aggregate votes from the application
> processor and other remote processors to manage clocks and power
> domains.
>
> The HWV on MT8196/MT6991 is incomplete and requires software to manually
> enable power supplies, parent clocks, and FENC, as well as write to both
> the HWV MMIO and the controller registers.
> Because of these constraints, the HWV cannot be modeled using generic
> clock, power domain, or interconnect APIs. Instead, a custom phandle is
> exceptionally used to provide direct, syscon-like register access to
> drivers.
>
> Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@...labora.com>
> Co-developed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Laura Nao <laura.nao@...labora.com>
> ---
Applied to clk-next
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