linux-kernel - Re: [PATCH v4 6/8] clk: loongson2: Add clock definitions for Loongson-2K0300 SoC

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Message-ID: <175848425977.4354.17680776767445912980@lazor>
Date: Sun, 21 Sep 2025 12:50:59 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Conor Dooley <conor+dt@...nel.org>, Huacai Chen <chenhuacai@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Michael Turquette <mturquette@...libre.com>, Rob Herring <robh@...nel.org>, WANG Xuerui <kernel@...0n.name>, Yao Zi <ziyao@...root.org>, Yinbo Zhu <zhuyinbo@...ngson.cn>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, loongarch@...ts.linux.dev, Mingcong Bai <jeffbai@...c.io>, Kexy Biscuit <kexybiscuit@...c.io>, Yao Zi <ziyao@...root.org>
Subject: Re: [PATCH v4 6/8] clk: loongson2: Add clock definitions for Loongson-2K0300 SoC

Quoting Yao Zi (2025-09-19 07:26:47)
> The clock controller of Loongson-2K0300 consists of three PLLs, requires
> an 120MHz external reference clock to function, and generates clocks in
> various frequencies for SoC peripherals.
> 
> Clock definitions for previous SoC generations could be reused for most
> clock hardwares. There're two gates marked as critical, clk_node_gate
> and clk_boot_gate, which supply the CPU cores and the system
> configuration bus. Disabling them leads to a SoC hang.
> 
> Signed-off-by: Yao Zi <ziyao@...root.org>
> ---

Applied to clk-next