linux-kernel - Re: [PATCH] clocksource/drivers/sprd: Enable register for timer counter from 32 bit to 64 bit

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <c85ffa6a-f885-47fc-b807-609f966e34c5@linux.alibaba.com>
Date: Mon, 22 Sep 2025 11:53:07 +0800
From: Baolin Wang <baolin.wang@...ux.alibaba.com>
To: Cixi Geng <cixi.geng@...ux.dev>, daniel.lezcano@...aro.org,
 tglx@...utronix.de
Cc: orsonzhai@...il.com, zhang.lyra@...il.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clocksource/drivers/sprd: Enable register for timer
 counter from 32 bit to 64 bit



On 2025/9/11 16:25, Cixi Geng wrote:
> From: Enlin Mu <enlin.mu@...soc.com>
> 
> Using 32 bit for suspend compensation, the max compensation time is 36
> hours(working clock is 32k).In some IOT devices, the suspend time may
> be long, even exceeding 36 hours. Therefore, a 64 bit timer counter
> is needed for counting.
> 
> Signed-off-by: Enlin Mu <enlin.mu@...soc.com>
> Signed-off-by: Cixi Geng <cixi.geng@...ux.dev>
> ---
>   drivers/clocksource/timer-sprd.c | 21 +++++++++++++++------
>   1 file changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/clocksource/timer-sprd.c b/drivers/clocksource/timer-sprd.c
> index 430cb99d8d79..742ee88b05d0 100644
> --- a/drivers/clocksource/timer-sprd.c
> +++ b/drivers/clocksource/timer-sprd.c
> @@ -30,6 +30,7 @@
>   #define TIMER_VALUE_SHDW_HI	0x1c
>   
>   #define TIMER_VALUE_LO_MASK	GENMASK(31, 0)
> +#define TIMER_VALUE_HI_MASK	GENMASK(31, 0)
>   
>   static void sprd_timer_enable(void __iomem *base, u32 flag)
>   {
> @@ -162,15 +163,23 @@ static struct timer_of suspend_to = {
>   
>   static u64 sprd_suspend_timer_read(struct clocksource *cs)
>   {
> -	return ~(u64)readl_relaxed(timer_of_base(&suspend_to) +
> -				   TIMER_VALUE_SHDW_LO) & cs->mask;
> +	u32 lo, hi;
> +
> +	lo = readl_relaxed(timer_of_base(&suspend_to) +
> +			TIMER_VALUE_SHDW_LO);
> +	hi = readl_relaxed(timer_of_base(&suspend_to) +
> +			TIMER_VALUE_SHDW_HI);

Can you align your code like the previous code?

> +	return ~(((u64)hi << 32) | lo);
>   }
>   
>   static int sprd_suspend_timer_enable(struct clocksource *cs)
>   {
> -	sprd_timer_update_counter(timer_of_base(&suspend_to),
> -				  TIMER_VALUE_LO_MASK);
> -	sprd_timer_enable(timer_of_base(&suspend_to), TIMER_CTL_PERIOD_MODE);
> +	writel_relaxed(TIMER_VALUE_LO_MASK,
> +			timer_of_base(&suspend_to) + TIMER_LOAD_LO);
> +	writel_relaxed(TIMER_VALUE_HI_MASK,
> +			timer_of_base(&suspend_to) + TIMER_LOAD_HI);
> +	sprd_timer_enable(timer_of_base(&suspend_to),
> +				TIMER_CTL_PERIOD_MODE|TIMER_CTL_64BIT_WIDTH);

Ditto. Otherwise LGTM.

>   
>   	return 0;
>   }
> @@ -186,7 +195,7 @@ static struct clocksource suspend_clocksource = {
>   	.read	= sprd_suspend_timer_read,
>   	.enable = sprd_suspend_timer_enable,
>   	.disable = sprd_suspend_timer_disable,
> -	.mask	= CLOCKSOURCE_MASK(32),
> +	.mask	= CLOCKSOURCE_MASK(64),
>   	.flags	= CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP,
>   };
>