linux-kernel - Re: [PATCH] ARM: dts: microchip: sam9x7: Add qspi controller

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Message-ID: <bc2278a2-387f-4e66-b275-8429bcb45db1@microchip.com>
Date: Mon, 22 Sep 2025 15:31:45 +0200
From: Nicolas Ferre <nicolas.ferre@...rochip.com>
To: Dharma Balasubiramani <dharma.b@...rochip.com>, Alexandre Belloni
	<alexandre.belloni@...tlin.com>, Claudiu Beznea <claudiu.beznea@...on.dev>,
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: dts: microchip: sam9x7: Add qspi controller

On 15/09/2025 at 11:13, Dharma Balasubiramani wrote:
> Add support for QSPI controller.
> 
> Signed-off-by: Dharma Balasubiramani <dharma.b@...rochip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
And queued in at91-dt branch.

> ---
> Driver and Doc support
> https://lore.kernel.org/lkml/20250908-microchip-qspi-v2-0-8f3d69fdd5c9@microchip.com/

Thanks for the reference to the (accepted) binding and driver changes!

Best regards,
   Nicolas

> ---
>   arch/arm/boot/dts/microchip/sam9x7.dtsi | 21 +++++++++++++++++++++
>   1 file changed, 21 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi
> index 66c07e642c3e..46dacbbd201d 100644
> --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi
> +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi
> @@ -271,6 +271,27 @@ AT91_XDMAC_DT_PERID(38))>,
>   			status = "disabled";
>   		};
>   
> +		qspi: spi@...14000 {
> +			compatible = "microchip,sam9x7-ospi";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0xf0014000 0x100>, <0x60000000 0x20000000>;
> +			reg-names = "qspi_base", "qspi_mmap";
> +			interrupts = <35 IRQ_TYPE_LEVEL_HIGH 7>;
> +			dmas = <&dma0
> +				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> +				AT91_XDMAC_DT_PERID(26))>,
> +				<&dma0
> +				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> +				AT91_XDMAC_DT_PERID(27))>;
> +			dma-names = "tx", "rx";
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>;
> +			clock-names = "pclk", "gclk";
> +			assigned-clocks = <&pmc PMC_TYPE_GCK 35>;
> +			assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_PLLADIV2>;
> +			status = "disabled";
> +		};
> +
>   		i2s: i2s@...1c000 {
>   			compatible = "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc";
>   			reg = <0xf001c000 0x100>;
> 
> ---
> base-commit: 590b221ed4256fd6c34d3dea77aa5bd6e741bbc1
> change-id: 20250915-sam9x7-qspi-dtsi-a4844266b17d
> 
> Best regards,