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Message-ID:
<TY3PR01MB113469F56AF81CBF593740EEE8612A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Mon, 22 Sep 2025 13:41:16 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: geert <geert@...ux-m68k.org>
CC: Linus Walleij <linus.walleij@...aro.org>, Prabhakar Mahadev Lad
<prabhakar.mahadev-lad.rj@...renesas.com>,
"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, biju.das.au
<biju.das.au@...il.com>
Subject: RE: [PATCH v4 1/2] pinctrl: renesas: rzg2l: Fix PMC restore
Hi Geert,
Thanks for the feedback.
> -----Original Message-----
> From: Geert Uytterhoeven <geert@...ux-m68k.org>
> Sent: 22 September 2025 14:13
> Subject: Re: [PATCH v4 1/2] pinctrl: renesas: rzg2l: Fix PMC restore
>
> Hi Biju,
>
> Thanks for your patch!
>
> On Sun, 21 Sept 2025 at 13:16, Biju Das <biju.das.jz@...renesas.com> wrote:
> > The PMC restore needs unlocking the register using PWPR register.
> >
> > Fixes: 14c32dc1f63d ("pinctrl: renesas: rzg2l: Add function pointer
> > for PFC register locking")
>
> I would rather say:
>
> Fixes: ede014cd1ea6422d ("pinctrl: renesas: rzg2l: Add function pointer for PMC register write")
>
> as that is the (later) commit that should have converted the direct write to an indirect call.
> However, both commits prepare for the advent of RZ/V2H support, and the actual issue cannot be
> experienced before commit 9bd95ac86e700ab8 ("pinctrl: renesas: rzg2l: Add support for RZ/V2H SoC").
Agreed. As for RZ/G2L this register is not write protected.
Cheers,
Biju
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