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Message-ID: <20250923133104.926672-2-yintirui@huawei.com>
Date: Tue, 23 Sep 2025 21:31:03 +0800
From: Yin Tirui <yintirui@...wei.com>
To: <akpm@...ux-foundation.org>, <david@...hat.com>,
<lorenzo.stoakes@...cle.com>, <Liam.Howlett@...cle.com>, <vbabka@...e.cz>,
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<linux-riscv@...ts.infradead.org>
CC: <wangkefeng.wang@...wei.com>, <chenjun102@...wei.com>,
<yintirui@...wei.com>
Subject: [PATCH RFC 1/2] pgtable: add pte_clrhuge() implementation for arm64 and riscv
Add pte_clrhuge() helper function for architectures that enable
ARCH_SUPPORTS_HUGE_PFNMAP to clear huge page attributes from PTE
entries.
This function provides the inverse operation of pte_mkhuge() and will
be needed for upcoming huge page splitting, where PTE entries derived
from huge page mappings need to have their huge page attributes cleared.
Signed-off-by: Yin Tirui <yintirui@...wei.com>
---
arch/arm64/include/asm/pgtable.h | 8 ++++++++
arch/riscv/include/asm/pgtable.h | 5 +++++
2 files changed, 13 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index abd2dee416b3..244755bad46f 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -366,6 +366,14 @@ static inline pte_t pte_mkinvalid(pte_t pte)
return pte;
}
+static inline pte_t pte_clrhuge(pte_t pte)
+{
+ pteval_t mask = PTE_TYPE_MASK & ~PTE_VALID;
+ pteval_t val = PTE_TYPE_PAGE & ~PTE_VALID;
+
+ return __pte((pte_val(pte) & ~mask) | val);
+}
+
static inline pmd_t pmd_mkcont(pmd_t pmd)
{
return __pmd(pmd_val(pmd) | PMD_SECT_CONT);
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 91697fbf1f90..125b241e6d2c 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -455,6 +455,11 @@ static inline pte_t pte_mkhuge(pte_t pte)
return pte;
}
+static inline pte_t pte_clrhuge(pte_t pte)
+{
+ return pte;
+}
+
#ifdef CONFIG_RISCV_ISA_SVNAPOT
#define pte_leaf_size(pte) (pte_napot(pte) ? \
napot_cont_size(napot_cont_order(pte)) :\
--
2.43.0
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