[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <8d861d33-142c-464e-8dc1-14a834eaa08a@linux.intel.com>
Date: Tue, 23 Sep 2025 14:19:33 +0800
From: Binbin Wu <binbin.wu@...ux.intel.com>
To: Rick Edgecombe <rick.p.edgecombe@...el.com>
Cc: kas@...nel.org, bp@...en8.de, chao.gao@...el.com,
dave.hansen@...ux.intel.com, isaku.yamahata@...el.com, kai.huang@...el.com,
kvm@...r.kernel.org, linux-coco@...ts.linux.dev,
linux-kernel@...r.kernel.org, mingo@...hat.com, pbonzini@...hat.com,
seanjc@...gle.com, tglx@...utronix.de, x86@...nel.org, yan.y.zhao@...el.com,
vannapurve@...gle.com, "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: Re: [PATCH v3 02/16] x86/tdx: Add helpers to check return status
codes
On 9/19/2025 7:22 AM, Rick Edgecombe wrote:
[...]
> /*
> diff --git a/arch/x86/include/asm/shared/tdx_errno.h b/arch/x86/include/asm/shared/tdx_errno.h
> index f98924fe5198..49ab7ecc7d54 100644
> --- a/arch/x86/include/asm/shared/tdx_errno.h
> +++ b/arch/x86/include/asm/shared/tdx_errno.h
> @@ -2,8 +2,10 @@
> #ifndef _X86_SHARED_TDX_ERRNO_H
> #define _X86_SHARED_TDX_ERRNO_H
>
> +#include <asm/trapnr.h>
> +
> /* Upper 32 bit of the TDX error code encodes the status */
> -#define TDX_SEAMCALL_STATUS_MASK 0xFFFFFFFF00000000ULL
> +#define TDX_STATUS_MASK 0xFFFFFFFF00000000ULL
>
> /*
> * TDX SEAMCALL Status Codes
> @@ -52,4 +54,54 @@
> #define TDX_OPERAND_ID_SEPT 0x92
> #define TDX_OPERAND_ID_TD_EPOCH 0xa9
>
> +#ifndef __ASSEMBLER__
> +#include <linux/bits.h>
> +#include <linux/types.h>
> +
> +static inline u64 TDX_STATUS(u64 err)
> +{
> + return err & TDX_STATUS_MASK;
> +}
TDX_STATUS() will be called in noinstr range.
I suppose __always_inline is still needed even if it's a single statement
function.
...
> @@ -903,7 +897,7 @@ static __always_inline u32 tdx_to_vmx_exit_reason(struct kvm_vcpu *vcpu)
> struct vcpu_tdx *tdx = to_tdx(vcpu);
> u32 exit_reason;
>
> - switch (tdx->vp_enter_ret & TDX_SEAMCALL_STATUS_MASK) {
> + switch (TDX_STATUS(tdx->vp_enter_ret)) {
> case TDX_SUCCESS:
> case TDX_NON_RECOVERABLE_VCPU:
> case TDX_NON_RECOVERABLE_TD:
>
[...]
Powered by blists - more mailing lists