linux-kernel - [PATCH v10 0/4] PCI: dwc: Add ECAM support with iATU configuration

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Message-Id: <20250923-controller-dwc-ecam-v10-0-e84390ba75fa@kernel.org>
Date: Tue, 23 Sep 2025 16:56:50 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Jingoo Han <jingoohan1@...il.com>, 
 Lorenzo Pieralisi <lpieralisi@...nel.org>, 
 Krzysztof Wilczyński <kwilczynski@...nel.org>, 
 Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, 
 Krzysztof Kozlowski <krzk@...nel.org>, 
 Alim Akhtar <alim.akhtar@...sung.com>, Jonathan Chocron <jonnyc@...zon.com>
Cc: linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-arm-msm@...r.kernel.org, 
 Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>, 
 Manivannan Sadhasivam <mani@...nel.org>, 
 Manivannan Sadhasivam <mani@...nel.org>
Subject: [PATCH v10 0/4] PCI: dwc: Add ECAM support with iATU configuration

The current implementation requires iATU for every configuration
space access which increases latency & cpu utilization.

Designware databook 5.20a, section 3.10.10.3 says about CFG Shift Feature,
which shifts/maps the BDF (bits [31:16] of the third header DWORD, which
would be matched against the Base and Limit addresses) of the incoming
CfgRd0/CfgWr0 down to bits[27:12]of the translated address.

Configuring iATU in config shift mode enables ECAM feature to access the
config space, which avoids iATU configuration for every config access.

Add cfg_shft_mode into struct dw_pcie_ob_atu_cfg to enable config shift mode.

As DBI comes under config space, this avoids remapping of DBI space
separately. Instead, it uses the mapped config space address returned from
ECAM initialization. Change the order of dw_pcie_get_resources() execution
to acheive this.

Enable the ECAM feature if the config space size is equal to size required
to represent number of buses in the bus range property.

ELBI registers are optional registers which are part of dwc. So move
ELBI resource mapping to dwc. Also change the dtbinding and devicetree
to make the elbi registers as optional one. Having ELBI as the required
one is making the ecam feature complicated.

The ELBI registers falls after the DBI space, PARF_SLV_DBI_ELBI register
gives us the offset from which ELBI starts. so use this offset and cfg
win to map these regions instead of doing the ioremap again.

On root bus, we have only the root port. Any access other than that
should not go out of the link and should return all F's. Since the iATU
is configured for the buses which starts after root bus, block the
transactions starting from function 1 of the root bus to the end of
the root bus (i.e from dbi_base + 4kb to dbi_base + 1MB) from going
outside the link through ECAM blocker through PARF registers.

Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <mani@...nel.org>
---
Changes in v10:
- Moved qcom_pci_config_ecam() to qcom_pcie_host_init()
- Reworded the comment in patch 3
- Rebased on top of pci/controller/qcom 
- Link to v9: https://lore.kernel.org/r/20250909-controller-dwc-ecam-v9-0-7d5b651840dd@kernel.org

Changes in v9:
 - Splitted the ECAM enablement change to avoid bisect hole and excluded pcie-al
   driver from DWC ECAM since it uses its own ECAM mechanism.
 - Squashed the patches 2 and 3 as patch 2 won't work without 3.

For the rest of the history, please refer v8 changeset:
https://lore.kernel.org/linux-pci/20250828-ecam_v4-v8-0-92a30e0fa02d@oss.qualcomm.com

---
Krishna Chaitanya Chundru (4):
      PCI: dwc: Add support for ELBI resource mapping
      PCI: dwc: Prepare the driver for enabling ECAM mechanism using iATU 'CFG Shift Feature'
      PCI: qcom: Prepare for the DWC ECAM enablement
      PCI: dwc: Support ECAM mechanism by enabling iATU 'CFG Shift Feature'

 drivers/pci/controller/dwc/Kconfig                |   1 +
 drivers/pci/controller/dwc/pci-exynos.c           |  62 ++++-----
 drivers/pci/controller/dwc/pcie-al.c              |   1 +
 drivers/pci/controller/dwc/pcie-designware-host.c | 148 ++++++++++++++++++++--
 drivers/pci/controller/dwc/pcie-designware.c      |  10 +-
 drivers/pci/controller/dwc/pcie-designware.h      |   7 +
 drivers/pci/controller/dwc/pcie-qcom-ep.c         |  15 +--
 drivers/pci/controller/dwc/pcie-qcom.c            |  84 ++++++++++--
 8 files changed, 261 insertions(+), 67 deletions(-)
---
base-commit: af8df709bf365f5583d31091280354e1ef0b201f
change-id: 20250908-controller-dwc-ecam-4c7c3136de14

Best regards,
-- 
Manivannan Sadhasivam <mani@...nel.org>