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Message-ID: <fe6a4073-eed0-499d-89ee-04559967b420@lunn.ch>
Date: Wed, 24 Sep 2025 20:41:06 +0200
From: Andrew Lunn <andrew@...n.ch>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: David Yang <mmyangfl@...il.com>, netdev@...r.kernel.org,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiner Kallweit <hkallweit1@...il.com>,
Simon Horman <horms@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v11 2/5] net: phy: introduce
PHY_INTERFACE_MODE_REVSGMII
On Wed, Sep 24, 2025 at 06:50:19PM +0100, Russell King (Oracle) wrote:
> On Mon, Sep 22, 2025 at 09:11:40PM +0800, David Yang wrote:
> > The "reverse SGMII" protocol name is a personal invention, derived from
> > "reverse MII" and "reverse RMII", this means: "behave like an SGMII
> > PHY".
>
> Sorry to mess you around, but... I've been getting further with stmmac's
> PCS stuff (I've started again with it) and I've come to realise that the
> stmmac driver is full of worms here.
>
> I think we need to have a bigger discussion here.
>
> Today, we have:
>
> - PHY_INTERFACE_MODE_REVMII
> - PHY_INTERFACE_MODE_REVRMII
>
> which both complement their _MII and _RMII definitions. So, it seems
> entirely sensible to also introduce REVSGMII to complement SGMII.
Maybe we need to think about, what does REVfoo actually mean?
Is it simply about, who provides the clock? For MII, the 'PHY'
provides the clock to the 'MAC;. So does REVMII simply mean a MAC in
REVMII mode provides the clock? Is more needed? As far as i know MII
does not have any inband signalling.
For RMII, it appears each side can provide the clock, or consume the
clock, or a 3rd party can provide the clock. It is a hardware design
choice. So does REVRMII actual mean anything? Again there is no inband
signalling.
GMII the transmit clock is provided by the transmitter, the receive
clock by the receiver. It is symmetrical. REV has no meaning here?
In theory, {R}GMII does have inband signalling, but it is pretty much
never used. REV for GMII could thus indicate what role the device is
playing in this in-band signalling?
For any SERDES based links likes like SGMII, 1000Base-X and above,
clocking is part of the SERDES, so symmetrical. There clearly is
inband signalling, mostly, when it is not broken because of
overclocked SGMII. But we have never needed to specify what role each
end needs to play.
> However, stmmac hardware supports "reverse" mode for more than just
> SGMII, also RGMII and SMII.
How does the databook describe reverse SGMII? How does it differ from
SGMII?
Andrew
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