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Message-Id: <20250924-imx8mp-prt8ml-v3-1-f498d7f71a94@pengutronix.de>
Date: Wed, 24 Sep 2025 10:34:12 +0200
From: Jonas Rebmann <jre@...gutronix.de>
To: Andrew Lunn <andrew@...n.ch>, Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>, Shengjiu Wang <shengjiu.wang@....com>,
Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Pengutronix Kernel Team <kernel@...gutronix.de>
Cc: Vladimir Oltean <vladimir.oltean@....com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-sound@...r.kernel.org, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, Jonas Rebmann <jre@...gutronix.de>,
Frank Li <Frank.Li@....com>
Subject: [PATCH v3 1/3] dt-bindings: net: dsa: nxp,sja1105: Add reset-gpios
property
Both the nxp,sja1105 and the nxp,sja1110 series feature an active-low
reset pin, rendering reset-gpios a valid property for all of the
nxp,sja1105 family.
Acked-by: Vladimir Oltean <vladimir.oltean@....com>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Reviewed-by: Frank Li <Frank.Li@....com>
Signed-off-by: Jonas Rebmann <jre@...gutronix.de>
---
Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
index 9432565f4f5d..e9dd914b0734 100644
--- a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
@@ -32,6 +32,15 @@ properties:
reg:
maxItems: 1
+ reset-gpios:
+ description:
+ A GPIO connected to the active-low RST_N pin of the SJA1105. Note that
+ reset of this chip is performed via SPI and the RST_N pin must be wired
+ to satisfy the power-up sequence documented in "SJA1105PQRS Application
+ Hints" (AH1704) sec. 2.4.4. Connecting the SJA1105 RST_N pin to a GPIO is
+ therefore discouraged.
+ maxItems: 1
+
spi-cpha: true
spi-cpol: true
--
2.51.0.297.gca2559c1d6
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