linux-kernel - Re: [PATCH 1/3] riscv: dts: spacemit: enable the i2c2 adapter on BPI-F3

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Message-ID: <B8749086963B3B54+aNNh9hw4TX6tVMdP@troy-wujie14pro-arch>
Date: Wed, 24 Sep 2025 11:13:58 +0800
From: Troy Mitchell <troy.mitchell@...ux.spacemit.com>
To: Troy Mitchell <troy.mitchell@...ux.spacemit.com>,
	linux-kernel@...r.kernel.org, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
	Yixun Lan <dlan@...too.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>,
	"open list:RISC-V ARCHITECTURE" <linux-riscv@...ts.infradead.org>,
	"open list:RISC-V SPACEMIT SoC Support" <spacemit@...ts.linux.dev>
Subject: Re: [PATCH 1/3] riscv: dts: spacemit: enable the i2c2 adapter on
 BPI-F3

On Tue, Sep 23, 2025 at 09:16:50PM +0200, Aurelien Jarno wrote:
> Hi Troy,
> 
> Thanks for the review.
> 
> On 2025-09-23 09:32, Troy Mitchell wrote:
> > On Sun, Sep 21, 2025 at 11:01:41PM +0200, Aurelien Jarno wrote:
> > > Define properties for the I2C adapter, and enable it on the BPI-F3. It
> > > will be used by the 24c02 eeprom.
> > > 
> > > Signed-off-by: Aurelien Jarno <aurelien@...el32.net>
> > > ---
> > > --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > > @@ -92,6 +92,13 @@ gmac1-pins {
> > >  		};
> > >  	};
> > >  
> > > +	i2c2_0_cfg: i2c2-0-cfg {
> > Should this be i2c2_4_cfg here?
> > From what I see, in the initial version the second cell was meant
> > to be the function number rather than the serial index.
> 
> Ok, I wasn't aware of that convention, I just reused the same numbering 
> of the downstream 6.6 kernel. I'll fix that and use i2c2_4_cfg.
I'm wrong..
The second number isn't function number.
You can find a more detailed discussion here:
(riscv: dts: spacemit: define a SPI controller node)

                - Troy
> 
> > It looks like the pwm part is also incorrect.
> 
> Yes, and also the submitted PCIE patches.
> 
> Aurelien
> 
> -- 
> Aurelien Jarno                          GPG: 4096R/1DDD8C9B
> aurelien@...el32.net                     http://aurel32.net
>