linux-kernel - Re: [PATCH 04/24] arm64: dts: qcom: glymur: Add QUPv3 configuration for serial engines

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Message-ID: <h3omdnam5tdosczvwnqwlbjgyksvfpdbhd4hpmury2mcsozavt@um4pqzvjzz4v>
Date: Thu, 25 Sep 2025 20:46:31 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Pankaj Patil <pankaj.patil@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jyothi Kumar Seerapu <jyothi.seerapu@....qualcomm.com>
Subject: Re: [PATCH 04/24] arm64: dts: qcom: glymur: Add QUPv3 configuration
 for serial engines

On Thu, Sep 25, 2025 at 12:18:29PM +0200, Konrad Dybcio wrote:
> On 9/25/25 8:32 AM, Pankaj Patil wrote:
> > From: Jyothi Kumar Seerapu <jyothi.seerapu@....qualcomm.com>
> > 
> > Add device tree support for QUPv3 serial engine protocols on Glymur.
> > Glymur has 24 QUP serial engines across 3 QUP wrappers, each with
> > support of GPI DMA engines.
> > 
> > Signed-off-by: Jyothi Kumar Seerapu <jyothi.seerapu@....qualcomm.com>
> > Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
> > ---
> 
> [...]
> 
> > +		gpi_dma2: dma-controller@...000 {
> > +			compatible = "qcom,glymur-gpi-dma", "qcom,sm6350-gpi-dma";
> > +			reg = <0 0x00800000 0 0x60000>;
> > +			interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_ESPI 129 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_ESPI 130 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_ESPI 131 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_ESPI 132 IRQ_TYPE_LEVEL_HIGH>;
> > +			dma-channels = <16>;
> > +			dma-channel-mask = <0x3f>;
> > +			#dma-cells = <3>;
> > +			iommus = <&apps_smmu 0xd76 0x0>;
> > +			status = "ok";
> 
> this is implied by default, drop
> 
> > +		};
> > +
> >  		qupv3_2: geniqup@...000 {
> >  			compatible = "qcom,geni-se-qup";
> >  			reg = <0x0 0x008c0000 0x0 0x3000>;
> > @@ -718,6 +744,339 @@ qupv3_2: geniqup@...000 {
> >  			#address-cells = <2>;
> >  			#size-cells = <2>;
> >  			ranges;
> > +			status = "ok";
> 
> ditto
> 
> (please resolve all occurences)
> 
> [...]
> 
> > +		cnoc_main: interconnect@...0000 {
> > +			compatible = "qcom,glymur-cnoc-main";
> > +			reg = <0x0 0x01500000 0x0 0x17080>;
> > +			qcom,bcm-voters = <&apps_bcm_voter>;
> > +			#interconnect-cells = <2>;
> > +		};
> > +
> > +		config_noc: interconnect@...0000 {
> > +			compatible = "qcom,glymur-cnoc-cfg";
> > +			reg = <0x0 0x01600000 0x0 0x6600>;
> > +			qcom,bcm-voters = <&apps_bcm_voter>;
> > +			#interconnect-cells = <2>;
> > +		};
> > +
> > +		system_noc: interconnect@...0000 {
> > +			compatible = "qcom,glymur-system-noc";
> > +			reg = <0x0 0x01680000 0x0 0x1c080>;
> > +			qcom,bcm-voters = <&apps_bcm_voter>;
> > +			#interconnect-cells = <2>;
> > +		};
> 
> This diff becomes unreadable really fast.. please play with git
> format-patch's --patience option

That comes as a price of split. I'd totally suggest a bigger chunks of
devices.

-- 
With best wishes
Dmitry