linux-kernel - Re: [PATCH v2 2/2] riscv: add HARDLOCKUP_DETECTOR

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Message-ID: <CAD=FV=VpCZzw24VH4DAvt5UhZHJD1TMO-t5HB8Kfw3pw+jO7sA@mail.gmail.com>
Date: Thu, 25 Sep 2025 12:59:35 -0700
From: Doug Anderson <dianders@...omium.org>
To: Yunhui Cui <cuiyunhui@...edance.com>
Cc: akpm@...ux-foundation.org, alex@...ti.fr, anup@...infault.org, 
	aou@...s.berkeley.edu, atish.patra@...ux.dev, catalin.marinas@....com, 
	johannes@...solutions.net, lihuafei1@...wei.com, mark.rutland@....com, 
	masahiroy@...nel.org, maz@...nel.org, mingo@...nel.org, 
	nicolas.schier@...ux.dev, palmer@...belt.com, paul.walmsley@...ive.com, 
	suzuki.poulose@....com, thorsten.blum@...ux.dev, wangjinchao600@...il.com, 
	will@...nel.org, yangyicong@...ilicon.com, zhanjie9@...ilicon.com, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	linux-perf-users@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 2/2] riscv: add HARDLOCKUP_DETECTOR_PERF support

Hi,

On Thu, Sep 25, 2025 at 1:48 AM Yunhui Cui <cuiyunhui@...edance.com> wrote:
>
> Enable the HARDLOCKUP_DETECTOR_PERF function based on RISC-V SSE.
>
> Signed-off-by: Yunhui Cui <cuiyunhui@...edance.com>
> ---
>  arch/riscv/Kconfig           |  3 +++
>  drivers/perf/riscv_pmu_sbi.c | 10 ++++++++++
>  2 files changed, 13 insertions(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index badbb2b366946..bb4e8c5a18717 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -186,6 +186,9 @@ config RISCV
>         select HAVE_PAGE_SIZE_4KB
>         select HAVE_PCI
>         select HAVE_PERF_EVENTS
> +       select PERF_EVENTS

I don't think you want to select this, do you? Just depend on it?

Other than that, this looks good to me.


-Doug