linux-kernel - Re: [PATCH net-next V5] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs

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Message-ID: <20250925203046.GA491548@ax162>
Date: Thu, 25 Sep 2025 16:30:46 -0400
From: Nathan Chancellor <nathan@...nel.org>
To: Arnd Bergmann <arnd@...db.de>
Cc: Jason Gunthorpe <jgg@...dia.com>,
	Patrisious Haddad <phaddad@...dia.com>,
	Tariq Toukan <tariqt@...dia.com>,
	Catalin Marinas <catalin.marinas@....com>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S . Miller" <davem@...emloft.net>,
	Saeed Mahameed <saeedm@...dia.com>,
	Leon Romanovsky <leon@...nel.org>, Mark Bloch <mbloch@...dia.com>,
	Netdev <netdev@...r.kernel.org>, linux-rdma@...r.kernel.org,
	linux-kernel@...r.kernel.org, Gal Pressman <gal@...dia.com>,
	Leon Romanovsky <leonro@...dia.com>,
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	Moshe Shemesh <moshe@...dia.com>, Will Deacon <will@...nel.org>,
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	Borislav Petkov <bp@...en8.de>,
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	Heiko Carstens <hca@...ux.ibm.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	Justin Stitt <justinstitt@...gle.com>, linux-s390@...r.kernel.org,
	llvm@...ts.linux.dev, Ingo Molnar <mingo@...hat.com>,
	Bill Wendling <morbo@...gle.com>,
	Nick Desaulniers <ndesaulniers@...gle.com>,
	Salil Mehta <salil.mehta@...wei.com>,
	Sven Schnelle <svens@...ux.ibm.com>,
	Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
	Yisen Zhuang <yisen.zhuang@...wei.com>,
	Leon Romanovsky <leonro@...lanox.com>,
	Linux-Arch <linux-arch@...r.kernel.org>,
	linux-arm-kernel@...ts.infradead.org,
	Mark Rutland <mark.rutland@....com>,
	Michael Guralnik <michaelgur@...lanox.com>, patches@...ts.linux.dev,
	Niklas Schnelle <schnelle@...ux.ibm.com>,
	Jijie Shao <shaojijie@...wei.com>, Simon Horman <horms@...nel.org>
Subject: Re: [PATCH net-next V5] net/mlx5: Improve write-combining test
 reliability for ARM64 Grace CPUs

On Thu, Sep 25, 2025 at 03:05:52PM +0200, Arnd Bergmann wrote:
> On the other hand, I would in general strongly prefer
> 
>      if (IS_ENABLED(CONFIG_FOO)) {
>             ...
>      }
> 
> over any of the preprocessor conditionals, both for readability
> and for improving compile-time coverage of the conditional code.
> 
> Unfortunately that does not work here because kernel_neon_begin()
> etc are only defined on Arm.

Even if the neon macros/functions were to be dummy defined, I suspect
clang may complain about the vector register clobbers on architectures
other than arm64, since it will validate some inline assembly even in
dead code.