linux-kernel - [tip: timers/clocksource] clocksource/drivers/arm_arch_timer

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <175883598912.709179.92952336985246107.tip-bot2@tip-bot2>
Date: Thu, 25 Sep 2025 21:33:09 -0000
From: "tip-bot2 for Marc Zyngier" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Marc Zyngier <maz@...nel.org>, Daniel Lezcano <daniel.lezcano@...aro.org>,
 Sudeep Holla <sudeep.holla@....com>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: timers/clocksource] clocksource/drivers/arm_arch_timer_mmio:
 Add MMIO clocksource

The following commit has been merged into the timers/clocksource branch of tip:

Commit-ID:     4e9bfe6969a768ef40c669fd100c9be70fb78a1f
Gitweb:        https://git.kernel.org/tip/4e9bfe6969a768ef40c669fd100c9be70fb78a1f
Author:        Marc Zyngier <maz@...nel.org>
AuthorDate:    Thu, 14 Aug 2025 16:46:22 +01:00
Committer:     Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Tue, 23 Sep 2025 12:32:08 +02:00

clocksource/drivers/arm_arch_timer_mmio: Add MMIO clocksource

The MMIO driver can also double as a clocksource, something that was
missing in its previous incarnation. Add it for completeness.

Signed-off-by: Marc Zyngier <maz@...nel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Tested-by: Sudeep Holla <sudeep.holla@....com>
Reviewed-by: Sudeep Holla <sudeep.holla@....com>
Link: https://lore.kernel.org/r/20250814154622.10193-5-maz@kernel.org
---
 drivers/clocksource/arm_arch_timer_mmio.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/clocksource/arm_arch_timer_mmio.c b/drivers/clocksource/arm_arch_timer_mmio.c
index 3522d1d..ebe1987 100644
--- a/drivers/clocksource/arm_arch_timer_mmio.c
+++ b/drivers/clocksource/arm_arch_timer_mmio.c
@@ -45,6 +45,7 @@ enum arch_timer_access {
 
 struct arch_timer {
 	struct clock_event_device	evt;
+	struct clocksource		cs;
 	struct arch_timer_mem		*gt_block;
 	void __iomem			*base;
 	enum arch_timer_access		access;
@@ -52,6 +53,7 @@ struct arch_timer {
 };
 
 #define evt_to_arch_timer(e) container_of(e, struct arch_timer, evt)
+#define cs_to_arch_timer(c) container_of(c, struct arch_timer, cs)
 
 static void arch_timer_mmio_write(struct arch_timer *timer,
 				  enum arch_timer_reg reg, u64 val)
@@ -128,6 +130,13 @@ static noinstr u64 arch_counter_mmio_get_cnt(struct arch_timer *t)
 	return ((u64) cnt_hi << 32) | cnt_lo;
 }
 
+static u64 arch_mmio_counter_read(struct clocksource *cs)
+{
+	struct arch_timer *at = cs_to_arch_timer(cs);
+
+	return arch_counter_mmio_get_cnt(at);
+}
+
 static int arch_timer_mmio_shutdown(struct clock_event_device *clk)
 {
 	struct arch_timer *at = evt_to_arch_timer(clk);
@@ -256,6 +265,16 @@ static void arch_timer_mmio_setup(struct arch_timer *at, int irq)
 					(unsigned long)CLOCKSOURCE_MASK(56));
 
 	enable_irq(at->evt.irq);
+
+	at->cs = (struct clocksource) {
+		.name	= "arch_mmio_counter",
+		.rating	= 300,
+		.read	= arch_mmio_counter_read,
+		.mask	= CLOCKSOURCE_MASK(56),
+		.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
+	};
+
+	clocksource_register_hz(&at->cs, at->rate);
 }
 
 static int arch_timer_mmio_frame_register(struct platform_device *pdev,