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Message-ID: <20250925052108.27351-1-prl@amazon.com>
Date: Wed, 24 Sep 2025 22:21:08 -0700
From: Priscilla Lam <prl@...zon.com>
To: <maz@...nel.org>
CC: <christoffer.dall@....com>, <dwmw@...zon.co.uk>, <graf@...zon.com>,
<gurugubs@...zon.com>, <jgrall@...zon.co.uk>, <joey.gouly@....com>,
<kvmarm@...ts.linux.dev>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <oliver.upton@...ux.dev>, <prl@...zon.com>,
<suzuki.poulose@....com>, <yuzenghui@...wei.com>
Subject: Re: [PATCH] KVM: arm64: Implement KVM_TRANSLATE ioctl for arm64
On 9/23/25, 2:26 AM, "Marc Zyngier" <maz@...nel.org> wrote:
> A guest doing this is a sure indication that it is completely broken,
> and will fail on actual HW, because it clearly ignores small
> insignificant details such as *ordering*.
>
> My other question still remains: why can't you perform this page table
> walk in userspace? It is actually much safer to do so because you can
> stop other vcpus while inspecting the PTs, and avoid a vcpu playing
> tricks behind your back -- something the in-kernel PTW doesn't try to
> avoid.
In our case, this comes from the Windows TPM driver using ldp32 to read
static adjacent CRB fields where ordering doesn't matter, but I agree
that a guest relying on this kind of translation is problematic. We'll
drop this KVM_TRANSLATE implementation and pursue a different approach
instead.
Thanks,
Priscilla
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