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Message-ID: <19c66c0e-e784-4403-abae-c4cd92f4a150@linaro.org>
Date: Thu, 25 Sep 2025 10:04:45 +0100
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Jingyi Wang <jingyi.wang@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Neil Armstrong <neil.armstrong@...aro.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
Jagadeesh Kona <quic_jkona@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Taniya Das <taniya.das@....qualcomm.com>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, aiqun.yu@....qualcomm.com,
tingwei.zhang@....qualcomm.com, trilok.soni@....qualcomm.com,
yijie.yang@....qualcomm.com
Subject: Re: [PATCH 5/9] dt-bindings: clock: qcom: document the Kaanapali GPU
Clock Controller
On 25/09/2025 00:56, Jingyi Wang wrote:
> From: Taniya Das <taniya.das@....qualcomm.com>
>
> Add bindings documentation for the Kaanapali Graphics Clock and Graphics
> power domain Controller.
>
> Signed-off-by: Taniya Das <taniya.das@....qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@....qualcomm.com>
> ---
> .../bindings/clock/qcom,kaanapali-gxclkctl.yaml | 63 ++++++++++++++++++++++
> .../bindings/clock/qcom,sm8450-gpucc.yaml | 2 +
> include/dt-bindings/clock/qcom,kaanapali-gpucc.h | 47 ++++++++++++++++
> .../dt-bindings/clock/qcom,kaanapali-gxclkctl.h | 12 +++++
> 4 files changed, 124 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
> new file mode 100644
> index 000000000000..31398aec839d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,kaanapali-gxclkctl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Graphics power domain Controller on Kaanapali
> +
> +maintainers:
> + - Taniya Das <taniya.das@....qualcomm.com>
> +
> +description: |
> + Qualcomm graphics power domain control module provides the power
> + domains on Qualcomm SoCs. This module exposes the GDSC power domain
> + which helps the recovery of Graphics subsystem.
> +
> + See also::
> + include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,kaanapali-gxclkctl
> +
> + power-domains:
> + description:
> + Power domains required for the clock controller to operate
> + items:
> + - description: GFX power domain
> + - description: GMXC power domain
> + - description: GPUCC(CX) power domain
> +
> + '#power-domain-cells':
> + const: 1
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - power-domains
> + - '#power-domain-cells'
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/power/qcom,rpmhpd.h>
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + clock-controller@...8024 {
> + compatible = "qcom,kaanapali-gxclkctl";
> + reg = <0 0x3d68024 0x0 0x8>;
> + power-domains = <&rpmhpd RPMHPD_GFX>,
> + <&rpmhpd RPMHPD_GMXC>,
> + <&gpucc 0>;
> + #power-domain-cells = <1>;
> + };
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
> index 44380f6f8136..6feaa32569f9 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
> @@ -14,6 +14,7 @@ description: |
> domains on Qualcomm SoCs.
>
> See also::
> + include/dt-bindings/clock/qcom,kaanapali-gpucc.h
> include/dt-bindings/clock/qcom,milos-gpucc.h
> include/dt-bindings/clock/qcom,sar2130p-gpucc.h
> include/dt-bindings/clock/qcom,sm4450-gpucc.h
> @@ -26,6 +27,7 @@ description: |
> properties:
> compatible:
> enum:
> + - qcom,kaanapali-gpucc
> - qcom,milos-gpucc
> - qcom,sar2130p-gpucc
> - qcom,sm4450-gpucc
> diff --git a/include/dt-bindings/clock/qcom,kaanapali-gpucc.h b/include/dt-bindings/clock/qcom,kaanapali-gpucc.h
> new file mode 100644
> index 000000000000..e8dc2009c71b
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,kaanapali-gpucc.h
> @@ -0,0 +1,47 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_KAANAPALI_H
> +#define _DT_BINDINGS_CLK_QCOM_GPU_CC_KAANAPALI_H
> +
> +/* GPU_CC clocks */
> +#define GPU_CC_AHB_CLK 0
> +#define GPU_CC_CB_CLK 1
> +#define GPU_CC_CX_ACCU_SHIFT_CLK 2
> +#define GPU_CC_CX_GMU_CLK 3
> +#define GPU_CC_CXO_AON_CLK 4
> +#define GPU_CC_CXO_CLK 5
> +#define GPU_CC_DEMET_CLK 6
> +#define GPU_CC_DPM_CLK 7
> +#define GPU_CC_FF_CLK_SRC 8
> +#define GPU_CC_FREQ_MEASURE_CLK 9
> +#define GPU_CC_GMU_CLK_SRC 10
> +#define GPU_CC_GPU_SMMU_VOTE_CLK 11
> +#define GPU_CC_GX_ACCU_SHIFT_CLK 12
> +#define GPU_CC_GX_GMU_CLK 13
> +#define GPU_CC_HUB_AON_CLK 14
> +#define GPU_CC_HUB_CLK_SRC 15
> +#define GPU_CC_HUB_CX_INT_CLK 16
> +#define GPU_CC_HUB_DIV_CLK_SRC 17
> +#define GPU_CC_MEMNOC_GFX_CLK 18
> +#define GPU_CC_PLL0 19
> +#define GPU_CC_PLL0_OUT_EVEN 20
> +#define GPU_CC_RSCC_HUB_AON_CLK 21
> +#define GPU_CC_RSCC_XO_AON_CLK 22
> +#define GPU_CC_SLEEP_CLK 23
> +
> +/* GPU_CC power domains */
> +#define GPU_CC_CX_GDSC 0
> +
> +/* GPU_CC resets */
> +#define GPU_CC_CB_BCR 0
> +#define GPU_CC_CX_BCR 1
> +#define GPU_CC_FAST_HUB_BCR 2
> +#define GPU_CC_FF_BCR 3
> +#define GPU_CC_GMU_BCR 4
> +#define GPU_CC_GX_BCR 5
> +#define GPU_CC_XO_BCR 6
> +
> +#endif
> diff --git a/include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h b/include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h
> new file mode 100644
> index 000000000000..460e21881c4f
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_QCOM_GX_CLKCTL_KAANAPALI_H
> +#define _DT_BINDINGS_CLK_QCOM_GX_CLKCTL_KAANAPALI_H
> +
> +/* GX_CLKCTL power domains */
> +#define GX_CLKCTL_GX_GDSC 0
> +
> +#endif
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
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