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Message-ID: <66a5084e-3f7a-452d-ad5b-5867528f57a5@oss.qualcomm.com>
Date: Thu, 25 Sep 2025 12:59:20 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Abel Vesa <abel.vesa@...aro.org>,
        Pankaj Patil <pankaj.patil@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Wesley Cheng <wesley.cheng@....qualcomm.com>
Subject: Re: [PATCH v2 23/24] arm64: dts: qcom: glymur: Add USB support

On 9/25/25 12:54 PM, Abel Vesa wrote:
> On 25-09-25 11:58:29, Pankaj Patil wrote:
>> From: Wesley Cheng <wesley.cheng@....qualcomm.com>
>>
>> The Glymur USB system contains 3 USB type C ports, and 1 USB multiport
>> controller.  This encompasses 5 SS USB QMP PHYs (3 combo and 2 uni) and 5
>> M31 eUSB2 PHYs.  The controllers are SNPS DWC3 based, and will use the
>> flattened DWC3 QCOM design.
>>
>> Signed-off-by: Wesley Cheng <wesley.cheng@....qualcomm.com>
>> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
>> ---

[...]

>> +
>> +		usb_1_ss0: usb@...0000 {
> 
> This is usb_1_ss0, but then you have usb1_ss1 ? 

I'm in favor of just calling it USB0/1/2/MP/HS because that's what it is..

[...]

>> +			dr_mode = "peripheral";
>> +
>> +			status = "disabled";
> 
> So you have the glue defined above, but not the actual controller (compatible snps,dwc3) ?
> 
> I don't see how this would work.
> 
> Same for all other controllers.

good morning!

6e762f7b8edc ("dt-bindings: usb: Introduce qcom,snps-dwc3")

Konrad

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