linux-kernel - Re: [PATCH 23/24] arm64: dts: qcom: glymur: Add USB support

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Message-ID: <a2008350-7aa7-4f94-9f19-926cf4e9d40c@oss.qualcomm.com>
Date: Thu, 25 Sep 2025 13:06:39 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Pankaj Patil <pankaj.patil@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Wesley Cheng <wesley.cheng@....qualcomm.com>
Subject: Re: [PATCH 23/24] arm64: dts: qcom: glymur: Add USB support

On 9/25/25 8:32 AM, Pankaj Patil wrote:
> From: Wesley Cheng <wesley.cheng@....qualcomm.com>
> 
> The Glymur USB system contains 3 USB type C ports, and 1 USB multiport
> controller.  This encompasses 5 SS USB QMP PHYs (3 combo and 2 uni) and 5
> M31 eUSB2 PHYs.  The controllers are SNPS DWC3 based, and will use the
> flattened DWC3 QCOM design.
> 
> Signed-off-by: Wesley Cheng <wesley.cheng@....qualcomm.com>
> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/glymur-crd.dts | 243 ++++++++++++++
>  arch/arm64/boot/dts/qcom/glymur.dtsi    | 569 ++++++++++++++++++++++++++++++++

Please split this into two commits

[...]

> +&i2c5 {
> +	status = "ok";

"okay" is preferred:

$ rg '"ok"' arch | wc -l
6

$ rg '"okay"' arch | wc -l
33019

on a random recent next tree

'status' is also expected to come as the last property (but still before
subnodes)

[...]

> +&usb_1_ss0 {
> +	dr_mode = "otg";
> +	usb-role-switch;

usb-role-switch should be in the SoC DT, and I think "otg" is the
default dr_mode

[...]

> +		usb_1_ss0: usb@...0000 {

the nodes should be sorted by unit address

Konrad