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Message-ID: <20250925121714.2514932-4-elder@riscstar.com>
Date: Thu, 25 Sep 2025 07:17:13 -0500
From: Alex Elder <elder@...cstar.com>
To: broonie@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org
Cc: dlan@...too.org,
ziyao@...root.org,
junhui.liu@...moral.tech,
linux-spi@...r.kernel.org,
devicetree@...r.kernel.org,
paul.walmsley@...ive.com,
palmer@...belt.com,
aou@...s.berkeley.edu,
alex@...ti.fr,
p.zabel@...gutronix.de,
spacemit@...ts.linux.dev,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v4 3/3] riscv: dts: spacemit: define a SPI controller node
Define a node for the fourth SoC SPI controller (number 3) on
the SpacemiT K1 SoC.
Enable it on the Banana Pi BPI-F3 board, which exposes this feature
via its GPIO block:
GPIO PIN 19: MOSI
GPIO PIN 21: MISO
GPIO PIN 23: SCLK
GPIO PIN 24: SS (inverted)
Define pincontrol configurations for the pins as used on that board.
(This was tested using a GigaDevice GD25Q64E SPI NOR chip.)
Signed-off-by: Alex Elder <elder@...cstar.com>
---
v4: - Formatted dmas and dma-names properties on one line
- Renamed a pinctrl node
.../boot/dts/spacemit/k1-bananapi-f3.dts | 7 +++++++
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +++++++++++++++++++
arch/riscv/boot/dts/spacemit/k1.dtsi | 15 ++++++++++++++
3 files changed, 42 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 2aaaff77831e1..d9d865fbe320e 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -14,6 +14,7 @@ aliases {
ethernet0 = ð0;
ethernet1 = ð1;
serial0 = &uart0;
+ spi3 = &spi3;
};
chosen {
@@ -92,6 +93,12 @@ &pdma {
status = "okay";
};
+&spi3 {
+ pinctrl-0 = <&ssp3_0_cfg>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index aff19c86d5ff3..6ce56584ff473 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -76,4 +76,24 @@ pwm14-1-pins {
drive-strength = <32>;
};
};
+
+ ssp3_0_cfg: ssp3-0-cfg {
+ ssp3-0-pins {
+ pinmux = <K1_PADCONF(75, 2)>, /* SCLK */
+ <K1_PADCONF(77, 2)>, /* MOSI */
+ <K1_PADCONF(78, 2)>; /* MISO */
+
+ bias-disable;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+
+ ssp3-0-frm-pins {
+ pinmux = <K1_PADCONF(76, 2)>; /* FRM (frame) */
+
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+ };
};
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 6cdcd80a7c83b..ce55897d34fac 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -797,6 +797,21 @@ uart9: serial@...17800 {
status = "disabled";
};
+ spi3: spi@...1c000 {
+ compatible = "spacemit,k1-spi";
+ reg = <0x0 0xd401c000 0x0 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&syscon_apbc CLK_SSP3>,
+ <&syscon_apbc CLK_SSP3_BUS>;
+ clock-names = "core", "bus";
+ resets = <&syscon_apbc RESET_SSP3>;
+ interrupts = <55>;
+ dmas = <&pdma 20>, <&pdma 19>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
/* sec_uart1: 0xf0612000, not available from Linux */
};
--
2.48.1
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