[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <un3pulyn7tv3qihdnqmktsctped32am2eglxzfpwyz3u3tqspf@fnieck3i67j2>
Date: Thu, 25 Sep 2025 04:30:14 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Wesley Cheng <wesley.cheng@....qualcomm.com>
Cc: krzk+dt@...nel.org, conor+dt@...nel.org, kishon@...nel.org,
vkoul@...nel.org, gregkh@...uxfoundation.org, robh@...nel.org,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-usb@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 07/10] phy: qualcomm: qmp-combo: Update QMP PHY with
Glymur settings
On Wed, Sep 24, 2025 at 05:52:25PM -0700, Wesley Cheng wrote:
> For SuperSpeed USB to work properly, there is a set of HW settings that
> need to be programmed into the USB blocks within the QMP PHY. Ensure that
> these settings follow the latest settings mentioned in the HW programming
> guide. The QMP USB PHY on Glymur is a USB43 based PHY that will have some
> new ways to define certain registers, such as the replacement of TXA/RXA
> and TXB/RXB register sets. This was replaced with the LALB register set.
>
> There are also some PHY init updates to modify the PCS MISC register space.
> Without these, the QMP PHY PLL locking fails.
>
> Signed-off-by: Wesley Cheng <wesley.cheng@....qualcomm.com>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 311 ++++++++-
> .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h | 12 +
> .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h | 17 +
> .../phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h | 12 +
> .../qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h | 639 ++++++++++++++++++
> .../phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h | 33 +
> .../phy-qcom-qmp-usb43-qserdes-com-v8.h | 224 ++++++
> drivers/phy/qualcomm/phy-qcom-qmp.h | 4 +
I think yo've squashed too many changes here. V5 and V6 headers should
be a part of the previous patch.
> 8 files changed, 1251 insertions(+), 1 deletion(-)
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb43-qserdes-com-v8.h
>
--
With best wishes
Dmitry
Powered by blists - more mailing lists